machxo2: Implement WireId/PipId, complete Bel part of API.

3 files changed, 72 insertions, 2 deletions

diff --git a/machxo2/arch.cc b/machxo2/arch.cc
index a01f96e6..ee334ed4 100644
--- a/machxo2/arch.cc
+++ b/machxo2/arch.cc
@@ -212,6 +212,22 @@ const std::map<IdString, std::string> &Arch::getBelAttrs(BelId bel) const { retu
 
 WireId Arch::getBelPinWire(BelId bel, IdString pin) const
 {
+    NPNR_ASSERT(bel != BelId());
+
+    int num_bel_wires = tileInfo(bel)->bel_data[bel.index].num_bel_wires;
+    const BelWirePOD *bel_wires = &*tileInfo(bel)->bel_data[bel.index].bel_wires;
+
+    for(int i = 0; i < num_bel_wires; i++)
+        if(bel_wires[i].port == pin.index) {
+            WireId ret;
+
+            ret.location.x = bel_wires[i].rel_wire_loc.x;
+            ret.location.y = bel_wires[i].rel_wire_loc.y;
+            ret.index = bel_wires[i].wire_index;
+
+            return ret;
+        }
+
     return WireId();
 }
 
diff --git a/machxo2/arch.h b/machxo2/arch.h
index b68a83ef..833866f7 100644
--- a/machxo2/arch.h
+++ b/machxo2/arch.h
@@ -338,6 +338,7 @@ struct Arch : BaseCtx
     // ---------------------------------------------------------------
     // Common Arch API. Every arch must provide the following methods.
 
+    // General
     ArchArgs args;
     Arch(ArchArgs args);
 
@@ -358,6 +359,7 @@ struct Arch : BaseCtx
     // tiles can complicate this?
     int getTilePipDimZ(int x, int y) const { return 2; }
 
+    // Bels
     BelId getBelByName(IdString name) const;
     IdString getBelName(BelId bel) const
     {
@@ -453,6 +455,7 @@ struct Arch : BaseCtx
     PortType getBelPinType(BelId bel, IdString pin) const;
     std::vector<IdString> getBelPins(BelId bel) const;
 
+    // Wires
     WireId getWireByName(IdString name) const;
     IdString getWireName(WireId wire) const;
     IdString getWireType(WireId wire) const;
@@ -468,6 +471,7 @@ struct Arch : BaseCtx
     const std::vector<WireId> &getWires() const;
     const std::vector<BelPin> &getWireBelPins(WireId wire) const;
 
+    // Pips
     PipId getPipByName(IdString name) const;
     IdString getPipName(PipId pip) const;
     IdString getPipType(PipId pip) const;
@@ -488,6 +492,7 @@ struct Arch : BaseCtx
     const std::vector<PipId> &getPipsUphill(WireId wire) const;
     const std::vector<PipId> &getWireAliases(WireId wire) const;
 
+    // Group
     GroupId getGroupByName(IdString name) const;
     IdString getGroupName(GroupId group) const;
     std::vector<GroupId> getGroups() const;
@@ -496,6 +501,7 @@ struct Arch : BaseCtx
     const std::vector<PipId> &getGroupPips(GroupId group) const;
     const std::vector<GroupId> &getGroupGroups(GroupId group) const;
 
+    // Delay
     delay_t estimateDelay(WireId src, WireId dst) const;
     delay_t predictDelay(const NetInfo *net_info, const PortRef &sink) const;
     delay_t getDelayEpsilon() const { return 0.001; }
@@ -514,22 +520,26 @@ struct Arch : BaseCtx
 
     ArcBounds getRouteBoundingBox(WireId src, WireId dst) const;
 
+    // Flow
     bool pack();
     bool place();
     bool route();
 
+    // Graphics
     const std::vector<GraphicElement> &getDecalGraphics(DecalId decal) const;
     DecalXY getBelDecal(BelId bel) const;
     DecalXY getWireDecal(WireId wire) const;
     DecalXY getPipDecal(PipId pip) const;
     DecalXY getGroupDecal(GroupId group) const;
 
+    // Cell Delay
     bool getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort, DelayInfo &delay) const;
     // Get the port class, also setting clockInfoCount to the number of TimingClockingInfos associated with a port
     TimingPortClass getPortTimingClass(const CellInfo *cell, IdString port, int &clockInfoCount) const;
     // Get the TimingClockingInfo of a port
     TimingClockingInfo getPortClockingInfo(const CellInfo *cell, IdString port, int index) const;
 
+    // Placer
     bool isValidBelForCell(CellInfo *cell, BelId bel) const;
     bool isBelLocationValid(BelId bel) const;
 
diff --git a/machxo2/archdefs.h b/machxo2/archdefs.h
index d33a3a3d..5852d24b 100644
--- a/machxo2/archdefs.h
+++ b/machxo2/archdefs.h
@@ -90,8 +90,32 @@ struct BelId
     }
 };
 
-typedef IdString WireId;
-typedef IdString PipId;
+struct WireId
+{
+    Location location;
+    int32_t index = -1;
+
+    bool operator==(const WireId &other) const { return index == other.index && location == other.location; }
+    bool operator!=(const WireId &other) const { return index != other.index || location != other.location; }
+    bool operator<(const WireId &other) const
+    {
+        return location == other.location ? index < other.index : location < other.location;
+    }
+};
+
+struct PipId
+{
+    Location location;
+    int32_t index = -1;
+
+    bool operator==(const PipId &other) const { return index == other.index && location == other.location; }
+    bool operator!=(const PipId &other) const { return index != other.index || location != other.location; }
+    bool operator<(const PipId &other) const
+    {
+        return location == other.location ? index < other.index : location < other.location;
+    }
+};
+
 typedef IdString GroupId;
 typedef IdString DecalId;
 
@@ -135,4 +159,24 @@ template <> struct hash<NEXTPNR_NAMESPACE_PREFIX BelId>
     }
 };
 
+template <> struct hash<NEXTPNR_NAMESPACE_PREFIX WireId>
+{
+    std::size_t operator()(const NEXTPNR_NAMESPACE_PREFIX WireId &wire) const noexcept
+    {
+        std::size_t seed = std::hash<NEXTPNR_NAMESPACE_PREFIX Location>()(wire.location);
+        seed ^= std::hash<int>()(wire.index) + 0x9e3779b9 + (seed << 6) + (seed >> 2);
+        return seed;
+    }
+};
+
+template <> struct hash<NEXTPNR_NAMESPACE_PREFIX PipId>
+{
+    std::size_t operator()(const NEXTPNR_NAMESPACE_PREFIX PipId &pip) const noexcept
+    {
+        std::size_t seed = std::hash<NEXTPNR_NAMESPACE_PREFIX Location>()(pip.location);
+        seed ^= std::hash<int>()(pip.index) + 0x9e3779b9 + (seed << 6) + (seed >> 2);
+        return seed;
+    }
+};
+
 }