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-rw-r--r--ecp5/arch.cc25
1 files changed, 24 insertions, 1 deletions
diff --git a/ecp5/arch.cc b/ecp5/arch.cc
index fe10d415..a200e102 100644
--- a/ecp5/arch.cc
+++ b/ecp5/arch.cc
@@ -92,12 +92,20 @@ static const ChipInfoPOD *get_chip_info(const RelPtr<ChipInfoPOD> *ptr) { return
void load_chipdb();
#endif
+#define LFE5U_25F_ONLY
+
Arch::Arch(ArchArgs args) : args(args)
{
#if defined(_MSC_VER)
load_chipdb();
#endif
-
+#ifdef LFE5U_25F_ONLY
+ if (args.type == ArchArgs::LFE5U_25F) {
+ chip_info = get_chip_info(reinterpret_cast<const RelPtr<ChipInfoPOD> *>(chipdb_blob_25k));
+ } else {
+ log_error("Unsupported ECP5 chip type.\n");
+ }
+#else
if (args.type == ArchArgs::LFE5U_25F) {
chip_info = get_chip_info(reinterpret_cast<const RelPtr<ChipInfoPOD> *>(chipdb_blob_25k));
} else if (args.type == ArchArgs::LFE5U_45F) {
@@ -107,6 +115,8 @@ Arch::Arch(ArchArgs args) : args(args)
} else {
log_error("Unsupported ECP5 chip type.\n");
}
+#endif
+
}
// -----------------------------------------------------------------------
@@ -302,4 +312,17 @@ bool Arch::isValidBelForCell(CellInfo *cell, BelId bel) const { return true; }
bool Arch::isBelLocationValid(BelId bel) const { return true; }
+// -----------------------------------------------------------------------
+
+
+bool Arch::getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort, delay_t &delay) const
+{
+ return false;
+}
+
+IdString Arch::getPortClock(const CellInfo *cell, IdString port) const { return IdString(); }
+
+bool Arch::isClockPort(const CellInfo *cell, IdString port) const { return false; }
+
+
NEXTPNR_NAMESPACE_END