diff options
Diffstat (limited to 'fpga_interchange')
-rw-r--r-- | fpga_interchange/arch.cc | 2 | ||||
-rw-r--r-- | fpga_interchange/macros.cc | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/fpga_interchange/arch.cc b/fpga_interchange/arch.cc index 6a7c4fe1..3ce9f79e 100644 --- a/fpga_interchange/arch.cc +++ b/fpga_interchange/arch.cc @@ -907,7 +907,7 @@ static void prepare_sites_for_routing(Context *ctx) // We can't rely on bel pins not clashing with cell names (for Xilinx they use different naming schemes, for // Nexus they are the same) so add a prefix to the bel pin name to disambiguate it - IdString cell_pin = ctx->id(stringf("%s_PHYS", ctx->nameOf(bel_pin))); + IdString cell_pin = ctx->idf("%s_PHYS", ctx->nameOf(bel_pin)); PortInfo port_info; port_info.name = cell_pin; diff --git a/fpga_interchange/macros.cc b/fpga_interchange/macros.cc index 8f7f8231..cc67833a 100644 --- a/fpga_interchange/macros.cc +++ b/fpga_interchange/macros.cc @@ -45,7 +45,7 @@ static const MacroExpansionPOD *lookup_macro_rules(const ChipInfoPOD *chip, IdSt static IdString derived_name(Context *ctx, IdString base_name, IdString suffix) { - return ctx->id(stringf("%s/%s", base_name.c_str(ctx), suffix.c_str(ctx))); + return ctx->idf("%s/%s", base_name.c_str(ctx), suffix.c_str(ctx)); } void Arch::expand_macros() |