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-rw-r--r--machxo2/examples/simple_timing.py13
1 files changed, 0 insertions, 13 deletions
diff --git a/machxo2/examples/simple_timing.py b/machxo2/examples/simple_timing.py
deleted file mode 100644
index 1067b556..00000000
--- a/machxo2/examples/simple_timing.py
+++ /dev/null
@@ -1,13 +0,0 @@
-for cname, cell in ctx.cells:
- if cell.type != "GENERIC_SLICE":
- continue
- if cname in ("$PACKER_GND", "$PACKER_VCC"):
- continue
- K = int(cell.params["K"])
- ctx.addCellTimingClock(cell=cname, port="CLK")
- for i in range(K):
- ctx.addCellTimingSetupHold(cell=cname, port="I[%d]" % i, clock="CLK",
- setup=ctx.getDelayFromNS(0.2), hold=ctx.getDelayFromNS(0))
- ctx.addCellTimingClockToOut(cell=cname, port="Q", clock="CLK", clktoq=ctx.getDelayFromNS(0.2))
- for i in range(K):
- ctx.addCellTimingDelay(cell=cname, fromPort="I[%d]" % i, toPort="F", delay=ctx.getDelayFromNS(0.2))