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Age
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Update placers to use new cluster APIs
gatecat
2021-05-06
10
-346
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+151
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Add default base implementation of cluster API
gatecat
2021-05-06
6
-7
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+104
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Add BaseClusterInfo for base implementation
gatecat
2021-05-06
1
-0
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+44
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arch_api: Outline of new cluster API
gatecat
2021-05-06
4
-14
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+43
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Merge pull request #692 from davidcorrigan714/patch-1
gatecat
2021-05-01
1
-2
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+2
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Update bits.h
David Corrigan
2021-04-30
1
-2
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+2
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clangformat
gatecat
2021-04-30
1
-40
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+30
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Merge pull request #664 from YosysHQ/gatecat/nexus-counter
gatecat
2021-04-30
8
-3
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+61
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interchange/nexus: Add counter example
gatecat
2021-04-30
8
-3
/
+61
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Merge pull request #690 from YosysHQ/gatecat/interchange-wire-types
gatecat
2021-04-30
5
-4
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+39
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interchange: Bump versions
gatecat
2021-04-30
1
-2
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+2
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interchange: Implement getWireType
gatecat
2021-04-30
3
-1
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+20
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interchange: Add wire types to chipdb
gatecat
2021-04-30
1
-1
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+17
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Merge pull request #689 from adamgreig/ecp5-alu
gatecat
2021-04-29
3
-1
/
+140
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Only set CIBOUT_BYP on MULTs that are not feeding an ALU.
Adam Greig
2021-04-29
1
-1
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+1
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Add check_alu to Ecp5Packer
Adam Greig
2021-04-29
1
-15
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+123
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Add relative constraints to position MULT18X18D near connected ALU54B.
Adam Greig
2021-04-29
2
-0
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+29
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Add ALU54B.REG_OPCODEOP1_1_CLK parameter support
Adam Greig
2021-04-29
1
-0
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+2
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Merge pull request #685 from YosysHQ/gatecat/nexus-routing
gatecat
2021-04-25
1
-4
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+1
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nexus: Enable placeAllAtOnce
gatecat
2021-04-25
1
-4
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+1
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Merge pull request #683 from antmicro/interchange-allow-loc-keyword
gatecat
2021-04-20
1
-2
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+4
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interchange: allow LOC keyword in XDC files
Jan Kowalewski
2021-04-20
1
-2
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+4
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Merge pull request #682 from YosysHQ/gatecat/default-cellpins
gatecat
2021-04-20
6
-8
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+81
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interchange: Bump versions
gatecat
2021-04-20
2
-1
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+1
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*
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interchange: Handle disconnected/missing cell pins
gatecat
2021-04-19
3
-6
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+56
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interchange: Add default cell connections to chipdb
gatecat
2021-04-19
1
-1
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+24
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Merge pull request #681 from YosysHQ/gatecat/more-pybindings
gatecat
2021-04-15
2
-0
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+8
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Add Python bindings for placement tests
gatecat
2021-04-15
2
-0
/
+8
*
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Merge pull request #680 from YosysHQ/gatecat/fix-util
gatecat
2021-04-15
1
-2
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+2
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Fix utilisation report when bel buckets are used
gatecat
2021-04-15
1
-2
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+2
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Merge pull request #678 from acomodi/initial-fasm-generation
gatecat
2021-04-14
21
-71
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+136
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gh-actions: increase python-fpga-interchange tag version
Alessandro Comodi
2021-04-14
1
-1
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+1
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*
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interchange: add FASM generation target and clean-up tests
Alessandro Comodi
2021-04-14
20
-70
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+135
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Merge pull request #679 from YosysHQ/gatecat/disable-absl
gatecat
2021-04-14
11
-63
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+54
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ci: Re-enable abseil for interchange CI
gatecat
2021-04-14
1
-1
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+1
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Hash table refactoring
gatecat
2021-04-14
10
-62
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+53
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Merge pull request #677 from YosysHQ/gatecat/ppip-no-input
gatecat
2021-04-13
1
-14
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+35
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interchange: Allow pseudo-cells with no input pins
gatecat
2021-04-13
1
-14
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+35
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Merge pull request #676 from YosysHQ/gatecat/fix-sta-crash
gatecat
2021-04-13
2
-58
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+73
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timing: Fix domain init when loops are present
gatecat
2021-04-13
2
-58
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+73
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Merge pull request #674 from adamgreig/heap-spreader-fix
gatecat
2021-04-12
1
-0
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+4
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HeAP: Skip high-strength cells in both cell loops.
Adam Greig
2021-04-12
1
-0
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+4
*
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Merge pull request #673 from YosysHQ/gatecat/fix-fast-bels-ref
gatecat
2021-04-12
1
-14
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+18
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fast_bels: Don't return pointer that might become invalid
gatecat
2021-04-12
1
-14
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+18
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clangformat
gatecat
2021-04-12
8
-133
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+134
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Merge pull request #668 from YosysHQ/gatecat/cell-bel-name-vcc
gatecat
2021-04-09
1
-6
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+10
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interchange: Disambiguate cell and bel pins when creating Vcc ties
gatecat
2021-04-09
1
-6
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+10
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Merge pull request #669 from YosysHQ/gatecat/prjoxide-pin
gatecat
2021-04-09
2
-0
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+3
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interchange: Pin prjoxide commit
gatecat
2021-04-09
2
-0
/
+3
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/
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Merge pull request #667 from YosysHQ/fix_qt
Miodrag Milanović
2021-04-08
1
-0
/
+4
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