Commit message (Collapse) | Author | Age | Files | Lines | |
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* | Fix typo | whitequark | 2020-06-25 | 1 | -1/+1 |
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* | Merge pull request #459 from whitequark/better-chipdb | David Shah | 2020-06-25 | 14 | -293/+362 |
|\ | | | | | CMake: rewrite chipdb handling from ground up | ||||
| * | CMake: require at least version 3.5 (Ubuntu 16.04). | whitequark | 2020-06-25 | 4 | -5/+4 |
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| * | CMake: rewrite chipdb handling from ground up. | whitequark | 2020-06-25 | 13 | -288/+358 |
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| * | CMake: only request a CXX compiler. | whitequark | 2020-06-24 | 2 | -2/+2 |
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* | | Merge pull request #458 from whitequark/patch-1 | David Shah | 2020-06-24 | 1 | -3/+0 |
|\ \ | |/ |/| | Remove dead links from README | ||||
| * | Remove dead links from README | whitequark | 2020-06-24 | 1 | -3/+0 |
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* | Merge pull request #457 from whitequark/better-bba | David Shah | 2020-06-24 | 3 | -22/+30 |
|\ | | | | | CMake: promote bba to a true subproject | ||||
| * | CMake: promote bba to a true subproject. | whitequark | 2020-06-23 | 3 | -22/+30 |
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* | clangformat | David Shah | 2020-06-12 | 1 | -12/+6 |
| | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | Merge pull request #454 from YosysHQ/ecp5-global-place | David Shah | 2020-06-10 | 1 | -2/+44 |
|\ | | | | | ecp5: Fix placement of DCCs to guarantee routeability | ||||
| * | ecp5: Fix placement of DCCs to guarantee routeability | David Shah | 2020-06-10 | 1 | -2/+44 |
|/ | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | Merge pull request #452 from smunaut/ice40_shiftreg_div_mode | David Shah | 2020-06-02 | 1 | -2/+12 |
|\ | | | | | ice40: Add support for the 2nd bit of SHIFTREG_DIV_MODE | ||||
| * | ice40: Add fallback behavior for Extra Cell config bits vectors | Sylvain Munaut | 2020-06-02 | 1 | -1/+11 |
| | | | | | | | | | | | | | | This helps make new nextpnr compatible with old chipdbs when a parameters goes from single bit to multi bit. Signed-off-by: Sylvain Munaut <tnt@246tNt.com> | ||||
| * | ice40: Add support for the 2nd bit of SHIFTREG_DIV_MODE | Sylvain Munaut | 2020-06-02 | 1 | -1/+1 |
|/ | | | | | | This requires the matching chipdb update from icestorm project ! Signed-off-by: Sylvain Munaut <tnt@246tNt.com> | ||||
* | Merge pull request #447 from whitequark/wasi | David Shah | 2020-05-24 | 8 | -20/+108 |
|\ | | | | | Port nextpnr-{ice40,ecp5} to WASI | ||||
| * | Port nextpnr-{ice40,ecp5} to WASI. | whitequark | 2020-05-23 | 8 | -20/+108 |
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This involves very few changes, all typical to WASM ports: * WASM doesn't currently support threads or atomics so those are disabled. * WASM doesn't currently support exceptions so the exception machinery is stubbed out. * WASM doesn't (and can't) have mmap(), so an emulation library is used. That library currently doesn't support MAP_SHARED flags, so MAP_PRIVATE is used instead. There is also an update to bring ECP5 bbasm CMake rules to parity with iCE40 ones, since although it is possible to embed chipdb into nextpnr on WASM, a 200 MB WASM file has very few practical uses. The README is not updated and there is no included toolchain file because at the moment it's not possible to build nextpnr with upstream boost and wasi-libc. Boost requires a patch (merged, will be available in boost 1.74.0), wasi-libc requires a few unmerged patches. | ||||
* | | Merge pull request #440 from YosysHQ/lattice-fixes | David Shah | 2020-05-18 | 3 | -0/+28 |
|\ \ | | | | | | | Fixes for the Lattice SERDES eye demo designs | ||||
| * | | ecp5: Disconnect dedicated DCU inputs if connected to constants | David Shah | 2020-05-14 | 1 | -0/+12 |
| | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
| * | | ecp5: Improve global routing robustness | David Shah | 2020-05-14 | 1 | -0/+11 |
| | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
| * | | ecp5: Don't promote VCC/GND to globals even if connected to clock port | David Shah | 2020-05-14 | 1 | -0/+2 |
| | | | | | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
| * | | lpf: Support // comments | David Shah | 2020-05-14 | 1 | -0/+3 |
| |/ | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | | clangformat | David Shah | 2020-05-16 | 2 | -4/+4 |
| | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | | Merge pull request #442 from nategraff-sifive/fix-unsupported-spelling | David Shah | 2020-05-14 | 3 | -10/+10 |
|\ \ | | | | | | | Fix spelling of 'unsupported' | ||||
| * | | Fix spelling of 'unsupported' | Nathaniel Graff | 2020-05-13 | 3 | -10/+10 |
| | | | | | | | | | | | | Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> | ||||
* | | | Merge pull request #441 from YosysHQ/eddie/fix_topo | Miodrag Milanović | 2020-05-14 | 1 | -16/+16 |
|\ \ \ | | | | | | | | | Fix embarassing use of topographical when meaning topological | ||||
| * | | | Fix embarassing use of topographical when meaning topological | Eddie Hung | 2020-05-14 | 1 | -16/+16 |
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* | | | Merge pull request #439 from edbordin/master | Miodrag Milanović | 2020-05-14 | 1 | -4/+6 |
|\ \ \ | |/ / |/| | | Minor patch for MinGW build | ||||
| * | | minor patch for MinGW build | Ed Bordin | 2020-05-14 | 1 | -4/+6 |
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* | | Merge pull request #437 from miek/lvcmos33d-drive | David Shah | 2020-05-12 | 1 | -0/+19 |
|\ \ | | | | | | | ecp5: Allow setting drive strength for LVCMOS33D IOs | ||||
| * | | ecp5: Allow setting drive strength for LVCMOS33D IOs | Mike Walters | 2020-05-12 | 1 | -0/+19 |
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* / | Add missing --top option | David Shah | 2020-05-09 | 1 | -0/+5 |
|/ | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | Merge branch 'rschlaikjer-rschlaikjer-mult18x18-register-timings' | David Shah | 2020-05-01 | 3 | -6/+125 |
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| * | ecp5: MULT18X18D timing fixes | David Shah | 2020-05-01 | 1 | -10/+26 |
| | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
| * | No cell delay for clocked MULT18X18D | Ross Schlaikjer | 2020-04-30 | 1 | -0/+2 |
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| * | Further condense | Ross Schlaikjer | 2020-04-29 | 1 | -11/+10 |
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| * | Dedupe clock error check | Ross Schlaikjer | 2020-04-29 | 1 | -12/+13 |
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| * | Issue warning for mixed-mode inputs | Ross Schlaikjer | 2020-04-29 | 3 | -40/+46 |
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| * | Handle register timing case | Ross Schlaikjer | 2020-04-29 | 1 | -6/+58 |
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| * | Use registered port class on mult18x18 | Ross Schlaikjer | 2020-04-29 | 1 | -3/+5 |
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| * | Alter MULT18X18D timing db based on register config | Ross Schlaikjer | 2020-04-28 | 3 | -2/+43 |
|/ | | | | | | | | | | | | | | | If the REG_INPUTA_CLK and REG_INPUTB_CLK values are set, then we should use the faster setup/hold timings for the 18x8 multiplier. Similarly, check the value of REG_OUTPUT_CLK for whether or not to use faster timings for the output. This is based on how I currently understand the registers to work - if anyone knows the actual rules for when each timing applies please do chime in to correct this implementation if necessary. Along the same lines, this PR does not address the case when the pipeline registers are enabled, since it is not clear to me how exactly that affects the timing. | ||||
* | Merge pull request #433 from YosysHQ/dave/pyfixes | David Shah | 2020-04-24 | 2 | -4/+17 |
|\ | | | | | python: Miscellaneous fixes | ||||
| * | python: Also convert regular map keys to string | David Shah | 2020-04-24 | 1 | -1/+3 |
| | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
| * | python: Improve general robustness during autocomplete | David Shah | 2020-04-24 | 1 | -0/+4 |
| | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
| * | python: Escape strings for autocomplete | David Shah | 2020-04-24 | 1 | -2/+8 |
| | | | | | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
| * | python: Wrap map IdString key when accessed by index | David Shah | 2020-04-24 | 1 | -1/+2 |
|/ | | | | Signed-off-by: David Shah <dave@ds0.me> | ||||
* | Merge pull request #432 from smunaut/fix_disconnect | David Shah | 2020-04-24 | 1 | -0/+1 |
|\ | | | | | design_utils: Set port.net to null when disconnecting | ||||
| * | design_utils: Set port.net to null when disconnecting | Sylvain Munaut | 2020-04-24 | 1 | -0/+1 |
|/ | | | | | | | | Without this the python bindings can't actually connect anything else to a disconnected port since the assert in connect_ports will think it's still connected Signed-off-by: Sylvain Munaut <tnt@246tNt.com> | ||||
* | Merge pull request #428 from mmicko/master | Miodrag Milanović | 2020-04-20 | 1 | -2/+2 |
|\ | | | | | Better Boost support | ||||
| * | old boost support | Miodrag Milanovic | 2020-04-20 | 1 | -2/+2 |
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