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| * cleanup: Remove dead/unused codeD. Shah2021-01-285-170/+3
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* clangformatD. Shah2021-01-283-25/+22
* Merge pull request #553 from YosysHQ/rel-sliceDavid Shah2021-01-2816-496/+375
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| * Make RelSlice uncopyableD. Shah2021-01-272-1/+4
| * Move RelPtr/RelSlice out of arches into commonD. Shah2021-01-274-118/+42
| * ecp5: Switch from RelPtr to RelSliceD. Shah2021-01-273-165/+143
| * ice40: Switch from RelPtr to RelSliceD. Shah2021-01-277-150/+138
| * nexus: Switch from RelPtr to RelSliceD. Shah2021-01-275-128/+114
* | Merge pull request #550 from pepijndevos/gw1n4David Shah2021-01-282-2/+2
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| * | Gowin: Add GW1N-4 supportPepijn de Vos2021-01-032-2/+2
* | | Merge pull request #554 from litghost/default_to_releaseDavid Shah2021-01-281-1/+3
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| * | | Default to Release, but allow other modes (e.g. Debug, RelWithDebInfo).Keith Rothman2021-01-271-1/+3
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* | | Merge pull request #555 from litghost/complete_archcheckDavid Shah2021-01-281-7/+75
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| * | Add connectivity round trip checks to archcheck.Keith Rothman2021-01-271-7/+75
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* / ecp5: Fix bottom clock tile renaming for tilegroupsD. Shah2021-01-251-0/+8
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* Merge pull request #549 from YosysHQ/updateMiodrag Milanović2021-01-02203-4212/+11691
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| * PyEval_InitThreads only for older than 3.9Miodrag Milanovic2021-01-021-0/+2
| * Update pybind11 to version 2.6.1Miodrag Milanovic2021-01-02202-4212/+11689
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* Merge pull request #548 from per-gron/c++17David Shah2020-12-302-5/+11
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| * C++17 compatibility: Don't use std::random_shufflePer Grön2020-12-302-5/+11
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* clangformatDavid Shah2020-12-307-43/+37
* Gowin target (#542)Pepijn de Vos2020-12-3021-8/+3235
* ecp5: Improve pseudo-diff IO error handlingDavid Shah2020-12-271-2/+4
* ice40: Nicer error for unconstrained SB_GB_IODavid Shah2020-12-271-0/+2
* command.cc: Improve help textDavid Shah2020-12-271-1/+1
* Merge pull request #543 from tcal-x/use-single-char-findDavid Shah2020-12-171-1/+1
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| * Use std::string::find(char c) when searching for a single character.Tim Callahan2020-12-161-1/+1
* | ecp5: Fix FF timing dataDavid Shah2020-12-171-4/+4
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* Merge pull request #540 from YosysHQ/dave/nexus-dotproductDavid Shah2020-12-102-28/+71
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| * nexus: Add MULTADDSUB9X9WIDE supportDavid Shah2020-12-082-28/+71
* | Merge pull request #536 from YosysHQ/dave/disable-default-guiDavid Shah2020-12-083-12/+17
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| * | cmake: Disable building GUI by defaultDavid Shah2020-12-083-12/+17
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* | Merge pull request #528 from YosysHQ/dave/nexus-lramDavid Shah2020-12-086-16/+167
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| * nexus: Fix LRAM pin typesDavid Shah2020-12-072-10/+11
| * nexus: Add support for initialised LRAMDavid Shah2020-12-074-12/+50
| * nexus: Add basic LRAM support (no init)David Shah2020-12-026-4/+116
* | ice40: Clarify feedback paths in PLL constraints codeDavid Shah2020-12-031-3/+3
* | Merge pull request #530 from YosysHQ/dave/ice40-derive-constrDavid Shah2020-12-031-31/+138
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| * | ice40: Derive PLL timing constraintsDavid Shah2020-12-031-31/+138
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* | Merge pull request #527 from YosysHQ/dave/nexus-clockingDavid Shah2020-12-025-2/+369
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| * nexus: Add PLL supportDavid Shah2020-12-024-3/+213
| * nexus: Add support for deriving timing constraints in packerDavid Shah2020-12-021-0/+96
| * nexus/pdc: Parse simple clock constraintsDavid Shah2020-12-021-0/+61
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* Merge pull request #526 from YosysHQ/dave/router2-timingDavid Shah2020-12-011-2/+17
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| * router2: Avoid ripup of critical pathDavid Shah2020-12-011-2/+17
* | Merge pull request #525 from YosysHQ/dave/router2-tweaksDavid Shah2020-12-011-5/+46
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| * router2: Make splitting of wires thread-safeDavid Shah2020-12-011-4/+39
| * router2: Add per-thread rngDavid Shah2020-12-011-1/+7
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* Merge pull request #524 from daveshah1/nextpnr-nexusMiodrag Milanović2020-11-3037-13/+7434
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| * nexus: Update docs and CMakeDavid Shah2020-11-304-3/+45
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