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* Merge pull request #472 from YosysHQ/ecp5-sysconfigDavid Shah2020-07-135-4/+58
|\ | | | | ecp5: SYSCONFIG in LPF support
| * ecp5: Add SYSCONFIG settings to bitstreamDavid Shah2020-07-124-3/+38
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| * ecp5: Add parsing of SYSCONFIG line in LPFDavid Shah2020-07-121-1/+20
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | Merge pull request #471 from smunaut/fix-pll-gbio-conflictDavid Shah2020-07-121-1/+2
|\ \ | |/ |/| ice40: If IO is used by SB_GB_IO, can't use it for PLL
| * ice40: If IO is used by SB_GB_IO, can't use it for PLLSylvain Munaut2020-07-091-1/+2
|/ | | | Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
* Merge pull request #469 from YosysHQ/new_parts_fixesMiodrag Milanović2020-07-085-16/+43
|\ | | | | Fixes for new part types
| * Fixes for new part typesMiodrag Milanovic2020-07-085-16/+43
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* Merge pull request #468 from YosysHQ/support_hx4kDavid Shah2020-07-084-23/+121
|\ | | | | Support 4K parts directly
| * Use proper names in GUIMiodrag Milanovic2020-07-082-24/+24
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| * Support rest of partsMiodrag Milanovic2020-07-084-13/+64
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| * Missed adding optionMiodrag Milanovic2020-07-081-0/+2
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| * Adding LP4K as wellMiodrag Milanovic2020-07-084-3/+18
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| * Support 4K parts directlyMiodrag Milanovic2020-07-084-5/+35
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* Fix assert, check should be other way arroundMiodrag Milanovic2020-07-061-1/+1
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* Merge pull request #463 from YosysHQ/fix-archcheckDavid Shah2020-07-027-9/+21
|\ | | | | Fix arch checks, and add these to CI
| * ci: Run --test architecture checksDavid Shah2020-06-292-0/+7
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| * ci: Bump trellis and icestorm versions to latestDavid Shah2020-06-291-3/+3
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| * ecp5: Fix getTileBelDimZDavid Shah2020-06-291-2/+3
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| * Avoid low-value and slow pip name check for ECP5David Shah2020-06-291-2/+2
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
| * ice40: Fix getBelsByTileDavid Shah2020-06-292-2/+6
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | Merge pull request #465 from whitequark/fix-trellis-discoverywhitequark2020-07-012-4/+28
|\ \ | | | | | | Improve Trellis discovery logic
| * | CMake: improve logic for discovering Trellis.whitequark2020-07-011-1/+25
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| * | CMake: fix path checks in chipdb build scripts.whitequark2020-07-012-3/+3
|/ / | | | | | | | | | | | | `if(NOT DEFINED)` is not appropriate since a variable that contains `-NOTFOUND` still counts as `DEFINED`. This can cause issues if configuration fails, writes `-NOTFOUND` to the cache, and is then restarted.
* / ecp5: Fix derivation of OSCG timing constraintDavid Shah2020-06-291-1/+5
|/ | | | Signed-off-by: David Shah <dave@ds0.me>
* placer1: Unlock even if placement failsDavid Shah2020-06-291-0/+2
| | | | | | | | Prevents a hang during routing when using --force Fixes #462 Signed-off-by: David Shah <dave@ds0.me>
* Make python bindings consistentMiodrag Milanovic2020-06-272-2/+4
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* Fix clangformat and execute itMiodrag Milanovic2020-06-275-27/+23
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* Update git ignore locationsMiodrag Milanovic2020-06-273-3/+4
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* Update some URLsDavid Shah2020-06-262-5/+5
| | | | Signed-off-by: David Shah <dave@ds0.me>
* Merge pull request #460 from whitequark/better-embedDavid Shah2020-06-2621-341/+266
|\ | | | | Simplify and improve chipdb embedding/loading
| * Simplify and improve chipdb embedding/loading.whitequark2020-06-2621-341/+266
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* | Update COPYINGDavid Shah2020-06-251-6/+6
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | HeAP: Add timeout to IO placementDavid Shah2020-06-251-0/+4
| | | | | | | | Signed-off-by: David Shah <dave@ds0.me>
* | Fix typowhitequark2020-06-251-1/+1
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* Merge pull request #459 from whitequark/better-chipdbDavid Shah2020-06-2514-293/+362
|\ | | | | CMake: rewrite chipdb handling from ground up
| * CMake: require at least version 3.5 (Ubuntu 16.04).whitequark2020-06-254-5/+4
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| * CMake: rewrite chipdb handling from ground up.whitequark2020-06-2513-288/+358
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| * CMake: only request a CXX compiler.whitequark2020-06-242-2/+2
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* | Merge pull request #458 from whitequark/patch-1David Shah2020-06-241-3/+0
|\ \ | |/ |/| Remove dead links from README
| * Remove dead links from READMEwhitequark2020-06-241-3/+0
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* Merge pull request #457 from whitequark/better-bbaDavid Shah2020-06-243-22/+30
|\ | | | | CMake: promote bba to a true subproject
| * CMake: promote bba to a true subproject.whitequark2020-06-233-22/+30
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* clangformatDavid Shah2020-06-121-12/+6
| | | | Signed-off-by: David Shah <dave@ds0.me>
* Merge pull request #454 from YosysHQ/ecp5-global-placeDavid Shah2020-06-101-2/+44
|\ | | | | ecp5: Fix placement of DCCs to guarantee routeability
| * ecp5: Fix placement of DCCs to guarantee routeabilityDavid Shah2020-06-101-2/+44
|/ | | | Signed-off-by: David Shah <dave@ds0.me>
* Merge pull request #452 from smunaut/ice40_shiftreg_div_modeDavid Shah2020-06-021-2/+12
|\ | | | | ice40: Add support for the 2nd bit of SHIFTREG_DIV_MODE
| * ice40: Add fallback behavior for Extra Cell config bits vectorsSylvain Munaut2020-06-021-1/+11
| | | | | | | | | | | | | | This helps make new nextpnr compatible with old chipdbs when a parameters goes from single bit to multi bit. Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
| * ice40: Add support for the 2nd bit of SHIFTREG_DIV_MODESylvain Munaut2020-06-021-1/+1
|/ | | | | | This requires the matching chipdb update from icestorm project ! Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
* Merge pull request #447 from whitequark/wasiDavid Shah2020-05-248-20/+108
|\ | | | | Port nextpnr-{ice40,ecp5} to WASI
| * Port nextpnr-{ice40,ecp5} to WASI.whitequark2020-05-238-20/+108
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This involves very few changes, all typical to WASM ports: * WASM doesn't currently support threads or atomics so those are disabled. * WASM doesn't currently support exceptions so the exception machinery is stubbed out. * WASM doesn't (and can't) have mmap(), so an emulation library is used. That library currently doesn't support MAP_SHARED flags, so MAP_PRIVATE is used instead. There is also an update to bring ECP5 bbasm CMake rules to parity with iCE40 ones, since although it is possible to embed chipdb into nextpnr on WASM, a 200 MB WASM file has very few practical uses. The README is not updated and there is no included toolchain file because at the moment it's not possible to build nextpnr with upstream boost and wasi-libc. Boost requires a patch (merged, will be available in boost 1.74.0), wasi-libc requires a few unmerged patches.
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