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| * Increment required python-fpga-interchange version.Keith Rothman2021-03-221-1/+1
| | | | | | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
| * Add pseudo pip data to chipdb (with schema bump).Keith Rothman2021-03-223-6/+143
|/ | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Merge pull request #635 from litghost/refactor_headersgatecat2021-03-2210-891/+1292
|\ | | | | Refactor header structures in FPGA interchange Arch.
| * Update tests to include Tcl header order fix.Keith Rothman2021-03-191-0/+0
| | | | | | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
| * Refactor header structures in FPGA interchange Arch.Keith Rothman2021-03-199-891/+1292
|/ | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Merge pull request #633 from YosysHQ/gatecat/optional-ipogatecat2021-03-191-3/+4
|\ | | | | cmake: Use IPO only if supported
| * cmake: Use IPO only if supportedgatecat2021-03-191-3/+4
|/ | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Merge pull request #631 from litghost/fixup_gui_dependenciesgatecat2021-03-183-4/+32
|\ | | | | Update root CMake with some additional features
| * Add option to link against "libprofiler".Keith Rothman2021-03-181-0/+4
| | | | | | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
| * Add IPO support for nextpnr, and have it enabled by default.Keith Rothman2021-03-181-0/+7
| | | | | | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
| * Fixup GUI link dependencies on headers from libraries.Keith Rothman2021-03-183-4/+21
| | | | | | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* | Merge pull request #630 from litghost/run_clangformatgatecat2021-03-184-4/+3
|\ \ | |/ |/| Run "make clangformat" to fix up master.
| * Run "make clangformat". to fix up master.Keith Rothman2021-03-184-4/+3
|/ | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Merge pull request #629 from litghost/move_hash_selection_to_headergatecat2021-03-182-8/+52
|\ | | | | Moving hash map/set type selection to header.
| * Moving hash map/set type selection to header.Keith Rothman2021-03-172-8/+52
|/ | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Merge pull request #619 from acomodi/add-cmake-infra-fpga-interchangegatecat2021-03-1745-215/+860
|\ | | | | Add CMake infrastructure for fpga interchange
| * fpga_interchange: temporarily disable failing testAlessandro Comodi2021-03-171-1/+2
| | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
| * fpga_interchange: minor fixes and comments additionAlessandro Comodi2021-03-163-22/+57
| | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
| * fpga_interchange: address review commentsAlessandro Comodi2021-03-1610-20/+96
| | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
| * github-actions: use capnp v0.8.0Alessandro Comodi2021-03-162-4/+4
| | | | | | | | | | | | This also updates the note in the README for the FPGA interchange Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
| * github-actions: pin python-fpga-interchange to tagAlessandro Comodi2021-03-161-1/+2
| | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
| * github-actions: add basic CI to test FPGA interchangeAlessandro Comodi2021-03-162-0/+74
| | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
| * fpga_interchange: re-add README with updated instructionsAlessandro Comodi2021-03-161-0/+69
| | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
| * fpga_interchange: tests: add techmap optional source fileAlessandro Comodi2021-03-164-3/+19
| | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
| * fpga_interchange: add bbasm step and archcheckAlessandro Comodi2021-03-167-41/+78
| | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
| * fpga_interchange: address review commentsAlessandro Comodi2021-03-164-32/+91
| | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
| * fpga_interchange: tests: added comment and fixed XDCAlessandro Comodi2021-03-1616-29/+74
| | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
| * fpga_interchange: chipdb: use generic patching functionAlessandro Comodi2021-03-163-41/+96
| | | | | | | | | | | | Also moved the RapidWright invocation script path under a CMake variable Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
| * fpga_interchange: cmake: generate only one device familyAlessandro Comodi2021-03-169-49/+72
| | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
| * fpga_interchange: tests: add cmake functionsAlessandro Comodi2021-03-1627-50/+215
| | | | | | | | | | | | Also move all tests in a tests directory Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
| * bump fpga_interchange_schemaAlessandro Comodi2021-03-161-0/+0
| | | | | | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
| * fpga_intrchange: add cmake infrastructure to generate chipdbsAlessandro Comodi2021-03-166-133/+122
|/ | | | Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
* Merge pull request #626 from YosysHQ/missing-includesgatecat2021-03-162-0/+5
|\ | | | | Add missing includes to fix WASI build
| * Add missing includes to fix WASI build.whitequark2021-03-162-0/+5
|/
* Merge pull request #625 from litghost/use_namespace_macrogatecat2021-03-1514-28/+34
|\ | | | | Use NEXTPNR_NAMESPACE macro's now that headers are seperated.
| * Use NEXTPNR_NAMESPACE macro's now that headers are seperated.Keith Rothman2021-03-1514-28/+34
|/ | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Merge pull request #621 from litghost/fix_header_nightmaregatecat2021-03-1549-2467/+3267
|\ | | | | Split nextpnr.h to allow for linear inclusion.
| * Split nextpnr.h to allow for linear inclusion.Keith Rothman2021-03-1549-2467/+3267
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | "nextpnr.h" is no longer the god header. Important improvements: - Functions in log.h can be used without including BaseCtx/Arch/Context. This means that log_X functions can be called without included "nextpnr.h" - NPNR_ASSERT can be used without including "nextpnr.h" by including "nextpnr_assertions.h". This allows NPNR_ASSERT to be used safely in any header file. - Types defined in "archdefs.h" are now available without including BaseCtx/Arch/Context. This means that utility classes that will be used inside of BaseCtx/Arch/Context can be defined safely in a self-contained header. Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* | Merge pull request #624 from YosysHQ/gatecat/fix-623gatecat2021-03-151-0/+2
|\ \ | |/ |/| opt-timing: Skip undriven nets
| * opt-timing: Skip undriven netsgatecat2021-03-151-0/+2
|/ | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Merge pull request #620 from litghost/handle_partial_routedgatecat2021-03-122-28/+54
|\ | | | | Add support for partially routed nets from the placer in router2.
| * Add support for partially routed nets from the placer in router2.Keith Rothman2021-03-122-28/+54
|/ | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Merge pull request #618 from YosysHQ/no-absl-on-wasigatecat2021-03-121-1/+3
|\ | | | | Don't include Abseil if it is not used
| * CMake: Don't include Abseil if it is not used.whitequark2021-03-121-1/+3
|/
* Merge pull request #615 from litghost/add_lookahead_diag_to_router2gatecat2021-03-101-13/+41
|\ | | | | Add diagnostic prints to debug lookahead performance.
| * Add diagnostic prints to debug lookahead performance.Keith Rothman2021-03-101-13/+41
|/ | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Merge pull request #617 from YosysHQ/no-absl-on-wasigatecat2021-03-102-2/+10
|\ | | | | Only depend on Abseil in threaded builds.
| * Only depend on Abseil in threaded builds.whitequark2021-03-102-2/+10
|/ | | | | | Abseil has a hard dependency on threads (not just in the build system but in many places in the base libraries), so there is no way to use it on WASI at the moment.
* Merge pull request #607 from litghost/add_absl_flat_hash_mapgatecat2021-03-094-1/+10
|\ | | | | Add absl::flat_hash_map.
| * Add absl::flat_hash_map.Keith Rothman2021-03-014-1/+10
| | | | | | | | | | | | | | This lowers the CPU cost of using the flat wire map in router2, and should use less memory as well. Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-06 12:12:52 +0000