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* viaduct: Add support for GUIsgatecat2023-04-111-5/+5
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* doc: fix the list formatYRabbit2023-01-011-3/+3
| | | | Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* doc: fix a mistypeYRabbit2022-12-231-2/+1
| | | | Signed-off-by: YRabbit <rabbit@yrabbit.cyou>
* api: add explain_invalid option to isBelLocationValidgatecat2022-12-072-2/+6
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* refactor: ArcBounds -> BoundingBoxgatecat2022-12-071-2/+2
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* api: Make NetInfo* of checkPipAvailForNet constgatecat2022-12-021-1/+1
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* netlist: Add PseudoCell APIgatecat2022-07-081-1/+15
| | | | | | | | | | | | | | | When implementing concepts such as partition pins or deliberately split nets, there's a need for something that looks like a cell (starts/ends routing with pins on nets, has timing data) but isn't mapped to a fixed bel in the architecture, but instead can have pin mappings defined at runtime. The PseudoCell allows this by providing an alternate, virtual-function based API for such cells. When a cell has `pseudo_cell` used, instead of calling functions such as getBelPinWire, getBelLocation or getCellDelay in the Arch API; such data is provided by the cell itself, fully flexible at runtime regardless of arch, via methods on the PseudoCell implementation.
* docs: Initial reference for the Viaduct 'uarch' APIgatecat2022-03-212-2/+137
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Fixed formatting typo in archapi.mdEzra Thomas2022-02-151-1/+1
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* generic: Refactor for faster performancegatecat2021-12-301-14/+21
| | | | | | | | This won't affect Python-built arches significantly; but will be useful for the future 'viaduct' functionality where generic routing graphs can be built on the C++ side; too. Signed-off-by: gatecat <gatecat@ds0.me>
* docs: Fix typogatecat2021-12-291-1/+1
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* archapi: Use arbitrary rather than actual placement in predictDelaygatecat2021-12-192-2/+2
| | | | | | | | | | | | This makes predictDelay be based on an arbitrary belpin pair rather than a arc of a net based on cell placement. This way 'what-if' decisions can be evaluated without actually changing placement; potentially useful for parallel placement. A new helper predictArcDelay behaves like the old predictDelay to minimise the impact on existing passes; only arches need be updated. Signed-off-by: gatecat <gatecat@ds0.me>
* common: Add JSON timing and utilisation reportgatecat2021-07-291-0/+22
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Update URLsgatecat2021-06-121-4/+4
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Remove redundant code after hashlib movegatecat2021-06-021-3/+3
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Add hash() member functionsgatecat2021-06-021-7/+7
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Update placers to use new cluster APIsgatecat2021-05-061-2/+2
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* arch_api: Outline of new cluster APIgatecat2021-05-062-5/+34
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Add "checkPipAvailForNet" to Arch API.Keith Rothman2021-03-221-0/+7
| | | | | | | | This is important for distiguishing valid pseudo pips in the FPGA interchange arch. This also avoids a double or triple lookup of pip->net map. Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* docs/archapi: Typo fixesgatecat2021-02-241-2/+2
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Update archapi.md with latest signature.Keith Rothman2021-02-231-1/+1
| | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Update generic.mdgatecat2021-02-201-4/+4
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Replace DelayInfo with DelayPair/DelayQuadgatecat2021-02-191-20/+5
| | | | | | | | | | | | | | | | | This replaces the arch-specific DelayInfo structure with new DelayPair (min/max only) and DelayQuad (min/max for both rise and fall) structures that form part of common code. This further reduces the amount of arch-specific code; and also provides useful data structures for timing analysis which will need to delay with pairs/quads of delays as it is improved. While there may be a small performance cost to arches that didn't separate the rise/fall cases (arches that aren't currently separating the min/max cases just need to be fixed...) in DelayInfo, my expectation is that inlining will mean this doesn't make much difference. Signed-off-by: gatecat <gatecat@ds0.me>
* Update docs/archapi.mdgatecat2021-02-171-2/+2
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Remove isValidBelForCellgatecat2021-02-162-13/+5
| | | | | | | | | | | | | | | | | This Arch API dates from when we were first working out how to implement placement validity checking, and in practice is little used by the core parts of placer1/HeAP and the Arch implementation involves a lot of duplication with isBelLocationValid. In the short term; placement validity checking is better served by the combination of checkBelAvail and isValidBelForCellType before placement; followed by isBelLocationValid after placement (potentially after moving/swapping multiple cells). Longer term, removing this API makes things a bit cleaner for a new validity checking API. Signed-off-by: gatecat <gatecat@ds0.me>
* generic: Update docsgatecat2021-02-151-2/+10
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Merge pull request #575 from YosysHQ/gatecat/belpin-2gatecat2021-02-151-0/+7
|\ | | | | Support for cell pin to bel pin mappings
| * Add getBelPinsForCellPin to Arch APIgatecat2021-02-101-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | This is a basic implementation, without considering "M of N" arrangements (e.g. for LUT permuation where you only want to route to 1 out of 4/6 sinks) or using a type other than IdString to identify bel pins. But this is also enough to start working out where in nextpnr will break due to removing the 1:1 cell:bel pin cardinality, as a next step. Signed-off-by: gatecat <gatecat@ds0.me>
* | Merge pull request #579 from litghost/add_control_for_split_iogatecat2021-02-121-0/+1
|\ \ | | | | | | Add control to whether GenericFrontend splits IO ports.
| * | Update docs.Keith Rothman2021-02-121-0/+1
| |/ | | | | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* | Make BaseArch getDecalGraphics return an empty rangegatecat2021-02-121-1/+1
| | | | | | | | | | | | | | Fix assertion failure when opening the GUI on an arch without any decals. Signed-off-by: gatecat <gatecat@ds0.me>
* | Add getBelHidden and add some missing "override" statements.Keith Rothman2021-02-111-0/+6
|/ | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Add BaseArchRanges for default ArchRanges typesgatecat2021-02-091-1/+1
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Update docs with API changesD. Shah2021-02-081-21/+160
| | | | Signed-off-by: D. Shah <dave@ds0.me>
* Add archArgs and archArgsToId to Arch APID. Shah2021-02-051-1/+9
| | | | Signed-off-by: D. Shah <dave@ds0.me>
* Update coding.mdD. Shah2021-02-031-0/+2
| | | | Signed-off-by: D. Shah <dave@ds0.me>
* docs: Update archapi.md with IdStringListD. Shah2021-02-021-12/+12
| | | | Signed-off-by: D. Shah <dave@ds0.me>
* arch: Add getNameDelimiter API for string listsD. Shah2021-02-021-1/+4
| | | | Signed-off-by: D. Shah <dave@ds0.me>
* Make BELs/PIPs lowercase as bels/pips per review comment.Keith Rothman2021-02-023-36/+36
| | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Update documentation.Keith Rothman2021-02-023-32/+77
| | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Implement partitioning in placer_heap.Keith Rothman2021-02-021-1/+1
| | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Add archcheck for partition methods.Keith Rothman2021-02-021-3/+20
| | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Make some partition names consistent.Keith Rothman2021-02-021-3/+3
| | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Initial refactoring of placer API.Keith Rothman2021-02-021-4/+39
| | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* cleanup: Spelling fixesD. Shah2021-01-283-7/+7
| | | | Signed-off-by: D. Shah <dave@ds0.me>
* nexus: Update docs and CMakeDavid Shah2020-11-301-0/+20
| | | | Signed-off-by: David Shah <dave@ds0.me>
* Update netlist.mdWilliam D. Jones2020-11-241-1/+1
| | | Add information about how top-level ports and connected nets differ from other ports and nets.
* Remove wire alias APIDavid Shah2020-10-152-14/+1
| | | | | | It has not actually been implemented in any router for over 2.5 years and causes nothing more than confusion. It can always be added back if it forms part of a future solution; possibly as part of a more general database structure rethink. Signed-off-by: David Shah <dave@ds0.me>
* docs: Tidy upDavid Shah2020-10-011-2/+2
| | | | Signed-off-by: David Shah <dave@ds0.me>
* update doc - UNTESTED on real hardwarekittennbfive2020-09-281-2/+9
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