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* clangformatgatecat2023-01-251-62/+38
* Add remapping of DSP clk/ce/rst signals in a block.Adam Greig2023-01-041-0/+253
* Include ALU54B in cell types with wire location overridesAdam Greig2023-01-041-1/+1
* api: add explain_invalid option to isBelLocationValidgatecat2022-12-071-1/+1
* refactor: Use IdString::in instead of || chainsgatecat2022-08-101-3/+2
* ecp5: Split the SLICE bel into separate LUT/FF/RAMW belsgatecat2022-04-071-99/+138
* refactor: New member functions to replace design_utilsgatecat2022-02-181-2/+2
* refactor: Use constids instead of id("..")gatecat2022-02-161-1/+1
* Fixing old emails and names in copyrightsgatecat2021-06-121-1/+1
* Use hashlib in placersgatecat2021-06-021-9/+0
* Use hashlib for core netlist structuresgatecat2021-06-021-6/+6
* timing: Replace all users of criticality with new enginegatecat2021-03-041-9/+3
* Remove isValidBelForCellgatecat2021-02-161-30/+6
* ecp5: Use snake case for arch-specific functionsD. Shah2021-02-031-4/+4
* ecp5: Improve bounding box accuracyDavid Shah2020-02-031-6/+15
* ecp5: Fix routing to shared DSP control inputsDavid Shah2019-10-251-0/+24
* ecp5: Fix handling of missing ports in LUT permutationDavid Shah2019-08-081-0/+4
* ecp5: Add --out-of-context for building hard macrosDavid Shah2019-08-071-1/+4
* ecp5: New Property interfaceDavid Shah2019-08-051-2/+2
* ecp5: Add criticality-based LUT permutationDavid Shah2019-02-251-0/+74
* ecp5: More optimal LUT6 placementDavid Shah2018-11-161-0/+6
* ecp5: Add DCU availability checkDavid Shah2018-11-151-0/+2
* ecp5: Improve mixed no-FF/FF placementDavid Shah2018-09-301-18/+20
* ecp5: Speedup placement using ArchCellInfoDavid Shah2018-08-181-12/+12
* ecp5: Update to use const IdStrings in place of PortPin/BelTypeDavid Shah2018-08-081-13/+13
* API change: Use CellInfo* and NetInfo* as cell/net handles (ECP5)David Shah2018-08-051-11/+9
* Remove implementations of deprecated APIsDavid Shah2018-07-241-3/+4
* ecp5: Adding a slow and conservative placement validity checkerDavid Shah2018-07-171-0/+109
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