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path: root/ecp5/constids.inc
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* Merge remote-tracking branch 'origin/master' into mmicko/ecp5_guiMiodrag Milanovic2019-12-281-0/+8
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| * ecp5: Add constids for new timing cell typesDavid Shah2019-10-261-0/+8
* | add newline at eofMiodrag Milanovic2019-12-281-1/+1
* | Add global wiresMiodrag Milanovic2019-12-151-1/+4
* | more new wires addedMiodrag Milanovic2019-12-141-0/+7
* | new wires in dbMiodrag Milanovic2019-12-131-1/+5
* | added siologicMiodrag Milanovic2019-12-131-0/+1
* | Add many new wiresMiodrag Milanovic2019-12-131-0/+7
* | display horizontal wires, add some globals to listMiodrag Milanovic2019-10-231-0/+2
* | Simplify layout of elementsMiodrag Milanovic2019-10-201-2/+0
* | more wires between switchboxesMiodrag Milanovic2019-10-201-0/+2
* | Less types neededMiodrag Milanovic2019-10-201-16/+8
* | Added type to wireMiodrag Milanovic2019-10-201-0/+19
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* ecp5: Add IDDR71B supportDavid Shah2019-10-091-0/+1
* ecp5: Preparations for new IO belsDavid Shah2019-10-091-1/+5
* ecp5: Conservative analysis of comb DSP timingDavid Shah2019-07-081-1/+8
* ecp5: Helper functions for DQS and ECLKDavid Shah2019-02-241-0/+2
* ecp5: Adding DTR, OSCG, CLKDIVF, USRMCLK, JTAGGDavid Shah2019-02-081-1/+99
* ecp5: Add {S}IOLOGIC constids and cellDavid Shah2018-12-121-0/+40
* ecp5: Adding real timing data to databaseDavid Shah2018-11-161-2/+27
* ecp5: Adding ancillary DCU belsDavid Shah2018-11-151-0/+7
* ecp5: Groundwork for DCU supportDavid Shah2018-11-151-0/+300
* ecp5: Add PLL supportDavid Shah2018-10-311-0/+23
* ecp5: Adding DSP supportDavid Shah2018-10-211-1/+616
* ecp5: Adding constids for blockramDavid Shah2018-10-051-0/+118
* ecp5: Add DCC Bels, fix global router post-rebaseDavid Shah2018-09-291-0/+4
* ecp5: Update to use const IdStrings in place of PortPin/BelTypeDavid Shah2018-08-081-0/+52