aboutsummaryrefslogtreecommitdiffstats
path: root/ecp5
Commit message (Expand)AuthorAgeFilesLines
* ecp5: Make database build depend on constids.incDavid Shah2019-10-201-2/+2
* ecp5: Add support for ECLKBRIDGECSDavid Shah2019-10-111-1/+52
* ecp5: Fix tristate IO registersDavid Shah2019-10-091-3/+9
* ecp5: Add support for IO registersDavid Shah2019-10-092-0/+103
* ecp5: Add IDDR71B supportDavid Shah2019-10-092-3/+16
* ecp5: Add ODDR71B supportDavid Shah2019-10-091-3/+14
* ecp5: Preparations for new IO belsDavid Shah2019-10-093-1/+16
* ecp5: Fix parametersDavid Shah2019-10-041-0/+4
* ecp5: Adding support for 36-bit wide PDP RAMsDavid Shah2019-10-014-19/+96
* Merge pull request #332 from YosysHQ/dave/python-refactorDavid Shah2019-09-191-96/+2
|\
| * python: Refactor out bindings shared between ECP5 and iCE40David Shah2019-09-151-96/+2
* | Merge branch 'precompiled-bba' of https://github.com/xobs/nextpnr into xobs-p...David Shah2019-09-191-18/+31
|\ \
| * | ecp5: add support for PREGENERATED_BBA_PATHSean Cross2019-09-171-18/+31
| |/
* | Merge pull request #330 from zeldin/bbaDavid Shah2019-09-191-5/+6
|\ \ | |/ |/|
| * CMake: Generate chipdbs in build tree when building out-of-treeMarcus Comstedt2019-09-151-3/+4
| * bba: Require explicit endianness flag, and supply itMarcus Comstedt2019-09-151-2/+2
* | python: Fix getWireBelPinsDavid Shah2019-09-152-0/+20
|/
* Merge pull request #329 from YosysHQ/dave/net_aliasesDavid Shah2019-09-131-0/+5
|\
| * json: Add support for net aliasesDavid Shah2019-09-131-0/+5
* | ecp5: Move clock constraints across IO and DCCADavid Shah2019-09-131-0/+9
|/
* ecp5: use $PYTHON_EXECUTABLE for python pathSean Cross2019-09-091-2/+2
* ecp5: Add support for clock gating with DCCADavid Shah2019-08-312-39/+87
* ecp5: Add full part name to bitstream headerDavid Shah2019-08-273-0/+23
* ecp5: Add GSR/SGSR supportDavid Shah2019-08-274-3/+22
* Rename clock restriction attribute to "noglobal"Arnaud Durand2019-08-241-2/+2
* Restrict clock promotion to globalArnaud Durand2019-08-221-0/+3
* Merge pull request #309 from YosysHQ/dsptimingDavid Shah2019-08-092-2/+25
|\
| * ecp5: Conservative analysis of comb DSP timingDavid Shah2019-07-082-2/+25
* | Add deprecation warning for default packagesDavid Shah2019-08-081-1/+4
* | ecp5: Fix handling of missing ports in LUT permutationDavid Shah2019-08-081-0/+4
* | clangfromatDavid Shah2019-08-071-2/+5
* | ecp5: Add --out-of-context for building hard macrosDavid Shah2019-08-077-12/+36
* | ecp5: Add a check for legacy parameter valuesDavid Shah2019-08-061-0/+12
* | ecp5: New Property interfaceDavid Shah2019-08-058-444/+549
* | Major Property improvements for common and iCE40David Shah2019-08-051-6/+6
* | ecp5: Fix missing LUT inputs, fixes #301David Shah2019-07-101-0/+4
|/
* Merge pull request #284 from YosysHQ/json_writeDavid Shah2019-07-036-85/+119
|\
| * clangformat runMiodrag Milanovic2019-06-251-16/+20
| * Merge masterMiodrag Milanovic2019-06-253-11/+18
| |\
| * | default for 5G is speed 8Miodrag Milanovic2019-06-211-1/+5
| * | enable lading of jsons and setting up contextMiodrag Milanovic2019-06-141-0/+1
| * | Use flags for each stepMiodrag Milanovic2019-06-142-3/+3
| * | restore arch info for ecp5Miodrag Milanovic2019-06-141-24/+91
| * | Load properties from json and propagate to context createMiodrag Milanovic2019-06-131-2/+2
| * | Save settings that we saved in projectMiodrag Milanovic2019-06-131-0/+2
| * | Remove concept of project and code connectedMiodrag Milanovic2019-06-131-55/+0
| * | Use properties for settings and save in jsonMiodrag Milanovic2019-06-121-1/+1
| * | Save top level attrs and store current stepMiodrag Milanovic2019-06-072-0/+3
| * | CleanupMiodrag Milanovic2019-06-072-13/+0
| * | No need for this oneMiodrag Milanovic2019-06-071-4/+0
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-19 05:00:07 +0000