| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Refactor header structures in FPGA interchange Arch. | Keith Rothman | 2021-03-19 | 1 | -2/+3 |
| * | Split nextpnr.h to allow for linear inclusion. | Keith Rothman | 2021-03-15 | 1 | -5/+8 |
| * | Initial LUT rotation logic. | Keith Rothman | 2021-02-26 | 1 | -0/+3 |
| * | Working FF example now that constant merging is done. | Keith Rothman | 2021-02-23 | 1 | -0/+1 |
| * | Replace DelayInfo with DelayPair/DelayQuad | gatecat | 2021-02-19 | 1 | -21/+0 |
| * | Add FPGA interchange frontend and backend. | Keith Rothman | 2021-02-15 | 1 | -0/+4 |
| * | Move all string data into BBA file. | Keith Rothman | 2021-02-05 | 1 | -18/+0 |
| * | Update copywrite headers. | Keith Rothman | 2021-02-04 | 1 | -1/+2 |
| * | Run "make clangformat". | Keith Rothman | 2021-02-04 | 1 | -5/+3 |
| * | Add initial updates to FPGA interchange arch for BEL buckets. | Keith Rothman | 2021-02-04 | 1 | -0/+22 |
| * | Initial FPGA interchange (which is just a cut-down xilinx arch). | Keith Rothman | 2021-02-04 | 1 | -0/+189 |
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index : iCE40/nextpnr | |
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