| Commit message (Collapse) | Author | Age | Files | Lines |
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Signed-off-by: gatecat <gatecat@ds0.me>
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Signed-off-by: gatecat <gatecat@ds0.me>
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Signed-off-by: gatecat <gatecat@ds0.me>
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interchange: allow LOC keyword in XDC files
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Signed-off-by: Jan Kowalewski <jkowalewski@antmicro.com>
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Signed-off-by: gatecat <gatecat@ds0.me>
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Signed-off-by: gatecat <gatecat@ds0.me>
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Signed-off-by: gatecat <gatecat@ds0.me>
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interchange: add FASM generation target and clean-up tests
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Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
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Signed-off-by: gatecat <gatecat@ds0.me>
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These are used for the LUT-as-GND-driver pseudo-pips in the Nexus arch,
which will probably be required for UltraScale too.
Signed-off-by: gatecat <gatecat@ds0.me>
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Signed-off-by: gatecat <gatecat@ds0.me>
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The pins created for tieing to Vcc were being named after the bel pin,
relying on the fact that Xilinx names cell and bel pins differently for
LUTs. This isn't true for Nexus devices which uses the same names for
both, and was causing a failure as a result.
This uses a "PHYS_" prefix that's highly unlikely to appear in a cell
pin name to disambiguate.
Signed-off-by: gatecat <gatecat@ds0.me>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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The previous logic tied LUT input pins to VCC if a wire was unplacable.
This missed a case where the net was present to the input of the LUT,
but a wire was still not legal. This case is now prevented by tying the
output of the LUT to an unused net.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Previous pseudo pips were the same cost as regular pips, but this is
definitely too fast, and meant that the router was prefering them.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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getBelPinWire and getBelPinType are marked as always inline, but were
not defined in a header.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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This prevents the general router from routing through sites, which is
not legal in FPGA interchange.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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[interchange] Add some documentation for the site router.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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interchange: counter: testing on multiple boards
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Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
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Changes:
- Adds LUT output pin to LutBelPOD.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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fpga_interchange: Add CMake support for Nexus/prjoxide
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Signed-off-by: gatecat <gatecat@ds0.me>
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Signed-off-by: gatecat <gatecat@ds0.me>
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Signed-off-by: gatecat <gatecat@ds0.me>
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Signed-off-by: gatecat <gatecat@ds0.me>
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Signed-off-by: gatecat <gatecat@ds0.me>
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This occurs when the driver pin and sink pin are part of the same site,
but not reachable with site routing only.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Previous code allowed router to entire sites with no sinks.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: gatecat <gatecat@ds0.me>
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FPGA interchange: Add counter and ram tests
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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This resulted in valid site routing solutions being missed. Underlying
bug was an off-by-one error when unwinding a failed solution.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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- Finishes implementation of SiteArch::nameOfPip and SiteArch::nameOfWire
- Adds "explain_bel_status", which should be an exhaustive diagnostic
of the status of a BEL placement.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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- Add IDEMPOTENT_CHECK define to perform some expected idempotent
operations more than once to verify they work as expected.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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If get_net_type was called before the driver was placed, it could return
the wrong value.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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This increases parallelism and should make the FPGA interchange CI
faster
Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
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Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
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Signed-off-by: Alessandro Comodi <acomodi@antmicro.com>
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