| Commit message (Collapse) | Author | Age | Files | Lines |
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Fixes:
- Only use map constant pins during routing, and not during placement.
- Unmapped cell ports have no BEL pins.
- Fix SiteRouter congestion not taking into account initial expansion.
- Fix psuedo-site pip output.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Also add debug_test target to debug archcheck.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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This replaces the arch-specific DelayInfo structure with new DelayPair
(min/max only) and DelayQuad (min/max for both rise and fall) structures
that form part of common code.
This further reduces the amount of arch-specific code; and also provides
useful data structures for timing analysis which will need to delay
with pairs/quads of delays as it is improved.
While there may be a small performance cost to arches that didn't
separate the rise/fall cases (arches that aren't currently separating
the min/max cases just need to be fixed...) in DelayInfo, my expectation
is that inlining will mean this doesn't make much difference.
Signed-off-by: gatecat <gatecat@ds0.me>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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The first site type that matches is now selected, under the premise that
the early site types are more general.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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This site router likely cannot handle the full problem space. It may
need to be replaced with a more generalize approach as testing
continues.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: gatecat <gatecat@ds0.me>
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Add Cell -> BEL Pin maps to FPGA interchange arch.
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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This also expands the FPGA interchange Arch BBA to include placement
constraints, but doesn't implement them yet.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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This Arch API dates from when we were first working out how to
implement placement validity checking, and in practice is little used by
the core parts of placer1/HeAP and the Arch implementation involves a
lot of duplication with isBelLocationValid.
In the short term; placement validity checking is better served by the
combination of checkBelAvail and isValidBelForCellType before placement;
followed by isBelLocationValid after placement (potentially after
moving/swapping multiple cells).
Longer term, removing this API makes things a bit cleaner for a new
validity checking API.
Signed-off-by: gatecat <gatecat@ds0.me>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Support for cell pin to bel pin mappings
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This is a basic implementation, without considering "M of N"
arrangements (e.g. for LUT permuation where you only want to route to 1
out of 4/6 sinks) or using a type other than IdString to identify bel
pins.
But this is also enough to start working out where in nextpnr will break
due to removing the 1:1 cell:bel pin cardinality, as a next step.
Signed-off-by: gatecat <gatecat@ds0.me>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Tcl reads something like "set port [get_ports x[0]]" as "invoke proc 0
with zero arguments", rather than just "[0]". To prevent exposing
non-Tcl users this, "[<number>]" just return themselves.
Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: D. Shah <dave@ds0.me>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
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