iCE40/nextpnr - [no description]

	Commit message (Expand)	Author	Age	Files	Lines
*	clangformat	gatecat	2021-03-03	3	-114/+108
*	Update FPGA interchange README.	Keith Rothman	2021-02-26	1	-11/+7
*	For now just return false in the site router.	Keith Rothman	2021-02-26	1	-1/+1
*	Initial LUT rotation logic.	Keith Rothman	2021-02-26	7	-7/+739
*	Add counter test.	Keith Rothman	2021-02-26	5	-0/+71
*	Fix compiler warnings introduced by -Wextra	gatecat	2021-02-25	2	-3/+3
*	Fix assorted bugs in FPGA interchange.	Keith Rothman	2021-02-23	8	-422/+626
*	Finish dedicated interconnect implementation.	Keith Rothman	2021-02-23	3	-139/+611
*	Working FF example now that constant merging is done.	Keith Rothman	2021-02-23	6	-8/+218
*	Add initial logic for handling dedicated interconnect situations.	Keith Rothman	2021-02-23	11	-26/+587
*	Move RapidWright git URI back to upstream.	Keith Rothman	2021-02-23	1	-5/+1
*	Remove some signedness warnings.	Keith Rothman	2021-02-23	1	-1/+1
*	Fix reference copy.	Keith Rothman	2021-02-23	1	-6/+6
*	Run "make clangformat".	Keith Rothman	2021-02-23	1	-6/+8
*	Initial working constant network support!	Keith Rothman	2021-02-23	4	-14/+145
*	Add constant network test case.	Keith Rothman	2021-02-23	5	-0/+42
*	Add tests to confirm constant routing import.	Keith Rothman	2021-02-23	2	-0/+36
*	Correct some bugs in the create_bba Makefile.	Keith Rothman	2021-02-23	1	-3/+9
*	Add initial constant network support to FPGA interchange arch.	Keith Rothman	2021-02-23	2	-7/+47
*	Change CellInfo in getBelPinsForCellPin to be const.	Keith Rothman	2021-02-23	1	-1/+1
*	Replace DelayInfo with DelayPair/DelayQuad	gatecat	2021-02-19	3	-36/+5
*	Fix sign mismatch.	Keith Rothman	2021-02-18	2	-2/+2
*	Do some spell checking on site_router.cc	Keith Rothman	2021-02-18	1	-18/+18
*	Add some utility methods for site instance access.	Keith Rothman	2021-02-18	3	-13/+42
*	Update README's with latest instructions and features.	Keith Rothman	2021-02-18	3	-20/+94
*	Add utility targets for getting plain text outputs.	Keith Rothman	2021-02-17	1	-1/+5
*	Add IOSTANDARD to ports.	Keith Rothman	2021-02-17	1	-1/+3
*	Emit fixed attributes to output physical netlist.	Keith Rothman	2021-02-17	1	-8/+19
*	Refactor "get only from iterator" to a utility.	Keith Rothman	2021-02-17	3	-12/+9
*	Keep all build artifacts under create_bba/build.	Keith Rothman	2021-02-17	2	-4/+5
*	Change how package pin IO sites are selected.	Keith Rothman	2021-02-17	3	-16/+52
*	Change makefiles to build a FPGA interchange BBA.	Keith Rothman	2021-02-17	4	-16/+106
*	Add examples invoking FPGA interchange nextpnr.	Keith Rothman	2021-02-17	11	-0/+152
*	Continue fixes.	Keith Rothman	2021-02-17	5	-23/+93
*	Disable traversal limit when reading logical netlist.	Keith Rothman	2021-02-17	1	-1/+3
*	Add initial site router.	Keith Rothman	2021-02-17	4	-6/+813
*	Working on standing up initial constraints system.	Keith Rothman	2021-02-17	3	-25/+468
*	clangformat	gatecat	2021-02-17	1	-3/+4
*	Merge pull request #586 from litghost/add_cell_bel_mapping_only	gatecat	2021-02-17	2	-13/+274
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\| *	Require `--package` when arch BBA contains multiple packages.	Keith Rothman	2021-02-16	1	-3/+11
\| *	[FPGA Interchange] Add Cell -> BEL Pin maps.	Keith Rothman	2021-02-16	2	-13/+266
* \|	Remove isValidBelForCell	gatecat	2021-02-16	2	-14/+0
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*	Move CMake logic into fpga-interchange-schema.	Keith Rothman	2021-02-15	1	-13/+1
*	Small fixes from review.	Keith Rothman	2021-02-15	1	-1/+1
*	Add FPGA interchange frontend and backend.	Keith Rothman	2021-02-15	6	-4/+914
*	Merge pull request #575 from YosysHQ/gatecat/belpin-2	gatecat	2021-02-15	1	-0/+3
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\| *	Add getBelPinsForCellPin to Arch API	gatecat	2021-02-10	1	-0/+3
* \|	Run "make clangformat".	Keith Rothman	2021-02-12	4	-66/+53
* \|	Remove capnp and libz for XDC parser PR.	Keith Rothman	2021-02-12	1	-4/+0
* \|	Refactor XDC parser into a little class for testing purposes.	Keith Rothman	2021-02-12	3	-14/+52