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* ice40: fix crash when packing LUTs with no outputStefan Riesenberger2022-03-141-24/+27
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* Switch to potentially-sparse net users arraygatecat2022-02-274-92/+54
| | | | | | | | This uses a new data structure for net.users that allows gaps, so removing a port from a net is no longer an O(n) operation on the number of users the net has. Signed-off-by: gatecat <gatecat@ds0.me>
* refactor: New member functions to replace design_utilsgatecat2022-02-183-47/+50
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* refactor: Use constids instead of id("..")gatecat2022-02-1610-660/+798
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* refactor: Use cell member functions to add portsgatecat2022-02-161-169/+162
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* refactor: New NetInfo and CellInfo constructorsgatecat2022-02-164-52/+26
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* Merge pull request #873 from YosysHQ/gatecat/ice40-carry-lutgatecat2022-01-161-0/+2
|\ | | | | ice40: Pack LUT at start of carry chain if there is 1 candidate
| * ice40: Pack LUT at start of carry chain if there is 1 candidategatecat2021-12-141-0/+2
| | | | | | | | Signed-off-by: gatecat <gatecat@ds0.me>
* | archapi: Use arbitrary rather than actual placement in predictDelaygatecat2021-12-192-6/+6
|/ | | | | | | | | | | | This makes predictDelay be based on an arbitrary belpin pair rather than a arc of a net based on cell placement. This way 'what-if' decisions can be evaluated without actually changing placement; potentially useful for parallel placement. A new helper predictArcDelay behaves like the old predictDelay to minimise the impact on existing passes; only arches need be updated. Signed-off-by: gatecat <gatecat@ds0.me>
* ice40: Use default value when IP is missing BUS_ADDR74 parametergatecat2021-07-201-3/+4
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* ice40: Fix order of values in errorgatecat2021-07-101-1/+1
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Fixing old emails and names in copyrightsgatecat2021-06-1226-44/+44
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Remove redundant code after hashlib movegatecat2021-06-021-46/+0
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Use hashlib in most remaining codegatecat2021-06-021-2/+2
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Using hashlib in archesgatecat2021-06-026-22/+21
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Use hashlib in routersgatecat2021-06-021-1/+1
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Use hashlib for core netlist structuresgatecat2021-06-024-39/+42
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Add hash() member functionsgatecat2021-06-021-0/+6
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Add default base implementation of cluster APIgatecat2021-05-062-2/+6
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Split nextpnr.h to allow for linear inclusion.Keith Rothman2021-03-152-8/+20
| | | | | | | | | | | | | | | | | | | "nextpnr.h" is no longer the god header. Important improvements: - Functions in log.h can be used without including BaseCtx/Arch/Context. This means that log_X functions can be called without included "nextpnr.h" - NPNR_ASSERT can be used without including "nextpnr.h" by including "nextpnr_assertions.h". This allows NPNR_ASSERT to be used safely in any header file. - Types defined in "archdefs.h" are now available without including BaseCtx/Arch/Context. This means that utility classes that will be used inside of BaseCtx/Arch/Context can be defined safely in a self-contained header. Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Replace DelayInfo with DelayPair/DelayQuadgatecat2021-02-194-72/+42
| | | | | | | | | | | | | | | | | This replaces the arch-specific DelayInfo structure with new DelayPair (min/max only) and DelayQuad (min/max for both rise and fall) structures that form part of common code. This further reduces the amount of arch-specific code; and also provides useful data structures for timing analysis which will need to delay with pairs/quads of delays as it is improved. While there may be a small performance cost to arches that didn't separate the rise/fall cases (arches that aren't currently separating the min/max cases just need to be fixed...) in DelayInfo, my expectation is that inlining will mean this doesn't make much difference. Signed-off-by: gatecat <gatecat@ds0.me>
* Remove isValidBelForCellgatecat2021-02-163-123/+94
| | | | | | | | | | | | | | | | | This Arch API dates from when we were first working out how to implement placement validity checking, and in practice is little used by the core parts of placer1/HeAP and the Arch implementation involves a lot of duplication with isBelLocationValid. In the short term; placement validity checking is better served by the combination of checkBelAvail and isValidBelForCellType before placement; followed by isBelLocationValid after placement (potentially after moving/swapping multiple cells). Longer term, removing this API makes things a bit cleaner for a new validity checking API. Signed-off-by: gatecat <gatecat@ds0.me>
* Add getBelHidden and add some missing "override" statements.Keith Rothman2021-02-111-1/+1
| | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Add BaseArchRanges for default ArchRanges typesgatecat2021-02-091-16/+1
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Merge pull request #568 from YosysHQ/dave/arch-overridegatecat2021-02-084-184/+117
|\ | | | | Create a new BaseArch that formally specifies the Arch API and provides some base implementations
| * Use 'T' postfix to disambiguate LHS and RHS of usingD. Shah2021-02-081-21/+21
| | | | | | | | | | | | | | Arches might otherwise have range types named ambigiously with the entry in ArchRanges. Signed-off-by: D. Shah <dave@ds0.me>
| * Add archArgs and archArgsToId to Arch APID. Shah2021-02-051-2/+3
| | | | | | | | Signed-off-by: D. Shah <dave@ds0.me>
| * ice40: Switch to BaseArchD. Shah2021-02-054-182/+114
| | | | | | | | Signed-off-by: D. Shah <dave@ds0.me>
* | Use RelSlice::ssize instead of cast-to-int throughoutD. Shah2021-02-081-3/+3
|/ | | | Signed-off-by: D. Shah <dave@ds0.me>
* Mark IdString and IdStringList single argument constructors explicit.Keith Rothman2021-02-043-6/+6
| | | | | | | | | Single argument constructors will silently convert to that type. This is typically not the right thing to do. For example, the nexus and ice40 arch_pybindings.h files were incorrectly parsing bel name strings, etc. Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* ice40: Use snake case for arch-specific functionsD. Shah2021-02-037-50/+50
| | | | | | | This makes the difference clearer between the general arch API that everyone must implement; and helper functions specific to one arch. Signed-off-by: D. Shah <dave@ds0.me>
* ice40: Implement IdStringList for all arch object namesD. Shah2021-02-025-57/+88
| | | | Signed-off-by: D. Shah <dave@ds0.me>
* refactor: Replace getXName().c_str(ctx) with ctx->nameOfXD. Shah2021-02-022-6/+5
| | | | | | This makes the ongoing migration to IdStringList easier. Signed-off-by: D. Shah <dave@ds0.me>
* arch: Add getNameDelimiter API for string listsD. Shah2021-02-021-0/+1
| | | | Signed-off-by: D. Shah <dave@ds0.me>
* Run "make clangformat".Keith Rothman2021-02-024-28/+21
| | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Add pybindings for new APIs.Keith Rothman2021-02-022-0/+14
| | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Rename Partition -> BelBucket.Keith Rothman2021-02-023-29/+29
| | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Add Partition APIs to ice40, nexus, gowin archs.Keith Rothman2021-02-023-0/+78
| | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Initial refactoring of placer API.Keith Rothman2021-02-021-0/+5
| | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* Seperate PipRange types in pybindings_shared.Keith Rothman2021-02-011-0/+4
| | | | Signed-off-by: Keith Rothman <537074+litghost@users.noreply.github.com>
* cleanup: Spelling fixesD. Shah2021-01-281-1/+1
| | | | Signed-off-by: D. Shah <dave@ds0.me>
* cleanup: Remove dead/unused codeD. Shah2021-01-281-32/+0
| | | | | | | Note that some '#if 0' code that might still be useful for debugging in the future has been retained. Signed-off-by: D. Shah <dave@ds0.me>
* Move RelPtr/RelSlice out of arches into commonD. Shah2021-01-271-42/+1
| | | | | | | The bba approach seems widely used enough that it's reasonable for this to become part of common code. Signed-off-by: D. Shah <dave@ds0.me>
* ice40: Switch from RelPtr to RelSliceD. Shah2021-01-276-149/+137
| | | | | | | | | | This replaces RelPtrs and a separate length field with a Rust-style slice containing both a pointer and a length; with bounds checking always enforced. Thus iterating over these structures is both cleaner and safer. Signed-off-by: D. Shah <dave@ds0.me>
* ice40: Nicer error for unconstrained SB_GB_IODavid Shah2020-12-271-0/+2
| | | | Signed-off-by: David Shah <dave@ds0.me>
* Use std::string::find(char c) when searching for a single character.Tim Callahan2020-12-161-1/+1
| | | | Signed-off-by: Tim Callahan <tcal@google.com>
* ice40: Clarify feedback paths in PLL constraints codeDavid Shah2020-12-031-3/+3
| | | | Signed-off-by: David Shah <dave@ds0.me>
* ice40: Derive PLL timing constraintsDavid Shah2020-12-031-31/+138
| | | | Signed-off-by: David Shah <dave@ds0.me>
* RelPtr: remove copy constructor and copy assignmentDavid Shah2020-11-131-0/+3
| | | | | | | These operations are meaningless for a data structure that references another structure relative to its location. Signed-off-by: David Shah <dave@ds0.me>
* ice40/pack/SB_PLL: Force fixed value to 4'b1111 if dynamic delay is usedSylvain Munaut2020-11-101-7/+9
| | | | | | | | It's been confirmed that : (1) this is required by the hardware (2) icecube will force that field to 4'b1111 in fixed mode Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
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