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* refactor: New member functions to replace design_utilsgatecat2022-02-183-49/+48
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* refactor: Use constids instead of id("..")gatecat2022-02-164-8/+16
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* mistral: Fix 'not handled in switch' compiler warninggatecat2022-02-161-1/+2
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* run clangformatgatecat2022-02-034-17/+21
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Mistral: Use log_error, remove leftover debugging printf.Olivier Galibert2022-01-193-37/+39
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* Mistral: fix gpio OE, add hmc bypass supportOlivier Galibert2022-01-183-29/+77
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* Sync with the current state of mistralOlivier Galibert2022-01-183-200/+4
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* mistral: Update to latest enum namegatecat2021-12-221-1/+1
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* archapi: Use arbitrary rather than actual placement in predictDelaygatecat2021-12-192-8/+6
| | | | | | | | | | | | This makes predictDelay be based on an arbitrary belpin pair rather than a arc of a net based on cell placement. This way 'what-if' decisions can be evaluated without actually changing placement; potentially useful for parallel placement. A new helper predictArcDelay behaves like the old predictDelay to minimise the impact on existing passes; only arches need be updated. Signed-off-by: gatecat <gatecat@ds0.me>
* mistral: DATAIN and DATAOUT of GPIO have swappedgatecat2021-12-121-2/+2
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* mistral: Add 'tools' dir to include pathgatecat2021-12-111-1/+1
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* mistral: Sync with yet another reorganizationOlivier Galibert2021-10-281-3/+2
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* Normalize formattingOlivier Galibert2021-10-192-13/+17
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* mistral: Use the iteratorsOlivier Galibert2021-10-191-11/+8
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* Merge pull request #848 from galibert/mastergatecat2021-10-171-0/+1
|\ | | | | mistral: Support the new routes-to-bin intermediate tool generation
| * mistral: Support the new routes-to-bin intermediate tool generationOlivier Galibert2021-10-171-0/+1
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* | mistral: Add internal oscillator supportOlivier Galibert2021-10-174-3/+15
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* cyclonev_hps_interface_mpu_general_purpose: Use a id_ identifierOlivier Galibert2021-10-152-1/+3
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* mistral: Add support for cyclonev_hps_interface_mpu_general_purposeOlivier Galibert2021-10-143-0/+15
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* mistral: Fix MLAB clusteringgatecat2021-10-112-2/+9
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* clangformatgatecat2021-10-112-29/+42
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Merge pull request #843 from Ravenslofty/lofty/mistral-basic-timinggatecat2021-10-113-21/+256
|\ | | | | mistral: very basic timing info
| * mistral: very basic timing infoLofty2021-10-103-21/+256
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* | mistral: clean up bel init slightlyLofty2021-10-081-18/+6
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* mistral: Adding support for MLABs as memorygatecat2021-10-058-21/+235
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* mistral: Add bel pins for MLAB write portgatecat2021-10-032-19/+38
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* clangformatgatecat2021-08-261-3/+3
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* mistral: Permute MLAB init bits correctlygatecat2021-08-241-0/+22
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* mistral: Use MLABs as if they're LABs (for now)Lofty2021-08-174-50/+63
| | | | Signed-off-by: Lofty <dan.ravensloft@gmail.com>
* mistral: Include mistral generated files in include dirsgatecat2021-08-151-1/+1
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* mistral: Fix pip binding checkgatecat2021-08-141-4/+11
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Fixing old emails and names in copyrightsgatecat2021-06-122-2/+2
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* mistral: Remove mistral root argumentgatecat2021-06-043-7/+1
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* mistral: Build libmistral as a cmake subdirgatecat2021-06-041-4/+3
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Remove redundant code after hashlib movegatecat2021-06-021-29/+2
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Use hashlib in most remaining codegatecat2021-06-021-2/+2
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Using hashlib in archesgatecat2021-06-025-20/+19
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Use hashlib for core netlist structuresgatecat2021-06-024-25/+25
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* Add hash() member functionsgatecat2021-06-021-0/+4
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* mistral: Fix nextpnr build with LLVMgatecat2021-06-023-4/+4
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* mistral: Make RBF compression optionalgatecat2021-05-302-1/+9
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* mistral: add getChipNameLofty2021-05-151-1/+1
| | | | Signed-off-by: Lofty <dan.ravensloft@gmail.com>
* mistral: Add MISTRAL_CLKBUF cell typegatecat2021-05-155-1/+15
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* mistral: Tidying upgatecat2021-05-1510-10/+10
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* mistral: Make router2 the defaultgatecat2021-05-151-1/+1
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* mistral: Speed up bel binding and checkinggatecat2021-05-151-4/+18
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* mistral: Workaround for weird SCLR issuegatecat2021-05-151-0/+7
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* mistral: Fix ENA and ACLR bitstream generationgatecat2021-05-154-4/+11
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* mistral: Disable global buffers that are currently brokengatecat2021-05-151-0/+2
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
* mistral: Compensate for EF_SEL mirroring in validity checkgatecat2021-05-151-2/+2
| | | | Signed-off-by: gatecat <gatecat@ds0.me>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-17 16:15:46 +0000