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| * | nexus: Tweaks for router1 performancegatecat2021-09-222-2/+4
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* / nexus: Fix DSP macro placementgatecat2021-09-224-32/+80
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* Added support for syn_useioff for enabling tri-state control FF integration i...Maciej Kurc2021-09-201-13/+23
* Use correct names for IDDRX1_ODDRX1 FASM featuresMaciej Kurc2021-09-172-22/+4
* Added automatic inference and integration of FFs driving T pin into IOLOGICMaciej Kurc2021-09-172-16/+177
* Added handling of the case when tri-state control net bypasses SIOLOGIC belMaciej Kurc2021-09-171-2/+81
* nexus: Fix getBelGlobalBufgatecat2021-09-021-1/+5
* nexus: Fix routeing of global clocks that also drive fabricgatecat2021-07-281-2/+35
* nexus: Basic packer and FASM support for I/ODDRgatecat2021-07-284-2/+124
* nexus: Add IOLOGIC pins datagatecat2021-07-283-2/+30
* nexus: Disable center DCC-thrus on 17k devicegatecat2021-06-163-1/+29
* nexus: Fix FASM gen for DCC-thrugatecat2021-06-161-3/+34
* Fixing old emails and names in copyrightsgatecat2021-06-1214-15/+15
* nexus: Fix LRAM x coordgatecat2021-06-101-0/+2
* Remove redundant code after hashlib movegatecat2021-06-021-61/+0
* Use hashlib in most remaining codegatecat2021-06-021-2/+2
* Using hashlib in archesgatecat2021-06-028-49/+47
* Use hashlib for core netlist structuresgatecat2021-06-026-62/+62
* Add hash() member functionsgatecat2021-06-021-0/+6
* router2: Add heatmap by routing resource typegatecat2021-05-203-0/+15
* Revert "nexus: Enable placeAllAtOnce"gatecat2021-05-061-1/+4
* nexus: Use new cluster APIgatecat2021-05-063-13/+17
* nexus: Enable placeAllAtOncegatecat2021-04-251-4/+1
* nexus: Fix some IO FASM gengatecat2021-03-301-0/+4
* nexus: Fix LIFCL-17 LRAM FASMgatecat2021-03-301-0/+2
* nexus: Fix default IO configgatecat2021-03-291-0/+2
* Merge pull request #651 from YosysHQ/gatecat/nexus-vccogatecat2021-03-291-3/+51
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| * nexus: Fix bank Vcco FASMgatecat2021-03-291-3/+51
* | nexus: Default HF_OSC_EN to ENABLEDgatecat2021-03-291-1/+1
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* nexus: Fix FASM gen for LIFCL-17gatecat2021-03-261-1/+4
* nexus: Add support for get_pins PDC commandgatecat2021-03-251-7/+56
* Split nextpnr.h to allow for linear inclusion.Keith Rothman2021-03-153-9/+20
* Merge pull request #609 from YosysHQ/gatecat/sta-v2gatecat2021-03-091-3/+3
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| * timing: Replace all users of criticality with new enginegatecat2021-03-041-3/+3
* | nexus: Support for hard DPHYgatecat2021-03-084-2/+73
* | nexus: Add pin definitions for DPHYgatecat2021-03-083-0/+48
* | nexus: Fix copypastagatecat2021-03-081-1/+1
* | nexus: Fail gracefully when seeing special pinsgatecat2021-03-051-1/+1
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* nexus: Fix global handling for LIFCL-17gatecat2021-03-031-1/+1
* nexus: Fix getPipDelay returning negative after refactorgatecat2021-02-231-1/+1
* Replace DelayInfo with DelayPair/DelayQuadgatecat2021-02-194-64/+29
* Remove isValidBelForCellgatecat2021-02-162-11/+0
* Merge pull request #575 from YosysHQ/gatecat/belpin-2gatecat2021-02-151-1/+1
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| * Start making use of getBelPinsForCellPin APIgatecat2021-02-101-1/+1
* | Add getBelHidden and add some missing "override" statements.Keith Rothman2021-02-111-1/+1
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* Add BaseArchRanges for default ArchRanges typesgatecat2021-02-091-16/+1
* Merge pull request #568 from YosysHQ/dave/arch-overridegatecat2021-02-085-303/+106
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| * Use 'T' postfix to disambiguate LHS and RHS of usingD. Shah2021-02-081-21/+21
| * Add archArgs and archArgsToId to Arch APID. Shah2021-02-051-2/+3
| * nexus: Switch to BaseArchD. Shah2021-02-055-301/+103
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