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| author | Marcelina Kościelnicka <mwk@0x04.net> | 2020-06-08 03:48:09 +0200 |
|---|---|---|
| committer | Marcelina Kościelnicka <mwk@0x04.net> | 2020-06-08 03:49:58 +0200 |
| commit | 28b9f49c9411fdde8f9b1f5fac3f79d324676872 (patch) | |
| tree | ee46a09d5e0666dc3ebbe425c946b4d0584d4d3d /backends/cxxrtl/cxxrtl_vcd_capi.h | |
| parent | 210d129d9ab0f13db179ca556a414baa119b716a (diff) | |
| download | yosys-28b9f49c9411fdde8f9b1f5fac3f79d324676872.tar.gz yosys-28b9f49c9411fdde8f9b1f5fac3f79d324676872.tar.bz2 yosys-28b9f49c9411fdde8f9b1f5fac3f79d324676872.zip | |
fsm_extract: avoid calling log_signal to determine wire name
log_signal can result in a string with spaces (when bit selection is
involved), which breaks the rule of IdString not containing whitespace.
Instead, remove the sigspec from the name entirely — given that the
resulting wire will have no users, it will be removed later anyway,
so its name doesn't really matter.
Fixes #2118
Diffstat (limited to 'backends/cxxrtl/cxxrtl_vcd_capi.h')
0 files changed, 0 insertions, 0 deletions