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| author | Clifford Wolf <clifford@clifford.at> | 2013-08-22 20:22:19 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2013-08-22 20:31:04 +0200 |
| commit | 39ee561169ba04374c2c630a5ef5a61537a67c13 (patch) | |
| tree | 8b70b654407178a08dc51eb5b99a007b00a9dc96 /backends/verilog/verilog_backend.cc | |
| parent | 4f4cb2307f8405f25e62cea264ebf20973ab30b1 (diff) | |
| download | yosys-39ee561169ba04374c2c630a5ef5a61537a67c13.tar.gz yosys-39ee561169ba04374c2c630a5ef5a61537a67c13.tar.bz2 yosys-39ee561169ba04374c2c630a5ef5a61537a67c13.zip | |
More explicit integer output in verilog backend
Diffstat (limited to 'backends/verilog/verilog_backend.cc')
| -rw-r--r-- | backends/verilog/verilog_backend.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/backends/verilog/verilog_backend.cc b/backends/verilog/verilog_backend.cc index 04a3c7643..da1a7433f 100644 --- a/backends/verilog/verilog_backend.cc +++ b/backends/verilog/verilog_backend.cc @@ -155,7 +155,7 @@ void dump_const(FILE *f, RTLIL::Const &data, int width = -1, int offset = 0, boo width = data.bits.size() - offset; if (data.str.empty() || width != (int)data.bits.size()) { if (width == 32 && !no_decimal) { - uint32_t val = 0; + int32_t val = 0; for (int i = offset+width-1; i >= offset; i--) { assert(i < (int)data.bits.size()); if (data.bits[i] != RTLIL::S0 && data.bits[i] != RTLIL::S1) @@ -163,7 +163,7 @@ void dump_const(FILE *f, RTLIL::Const &data, int width = -1, int offset = 0, boo if (data.bits[i] == RTLIL::S1) val |= 1 << (i - offset); } - fprintf(f, "%d", (int)val); + fprintf(f, "%s32'sd%u", val < 0 ? "-" : "", abs(val)); } else { dump_bits: fprintf(f, "%d'b", width); |