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| author | Clifford Wolf <clifford@clifford.at> | 2013-06-10 13:56:03 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2013-06-10 13:56:03 +0200 |
| commit | 59dd02baa2877e98b377989d22c3657b525bd090 (patch) | |
| tree | ba651916dec8f24a4e465077c8733bbc94bdb3fd /frontends/ast/genrtlil.cc | |
| parent | db98a18edb02a5c3a0c3f26efec0e01f8232790a (diff) | |
| download | yosys-59dd02baa2877e98b377989d22c3657b525bd090.tar.gz yosys-59dd02baa2877e98b377989d22c3657b525bd090.tar.bz2 yosys-59dd02baa2877e98b377989d22c3657b525bd090.zip | |
Fixes and improvements in AST const folding
Diffstat (limited to 'frontends/ast/genrtlil.cc')
| -rw-r--r-- | frontends/ast/genrtlil.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/frontends/ast/genrtlil.cc b/frontends/ast/genrtlil.cc index 1fb762fc1..c75bca911 100644 --- a/frontends/ast/genrtlil.cc +++ b/frontends/ast/genrtlil.cc @@ -647,7 +647,7 @@ RTLIL::SigSpec AstNode::genRTLIL(int width_hint) current_module->wires[str] = wire; } else if (id2ast->type == AST_PARAMETER || id2ast->type == AST_LOCALPARAM) { - chunk = RTLIL::Const(id2ast->bits); + chunk = RTLIL::Const(id2ast->children[0]->bits); goto use_const_chunk; } else if (!id2ast || (id2ast->type != AST_WIRE && id2ast->type != AST_AUTOWIRE && |