diff options
| author | Clifford Wolf <clifford@clifford.at> | 2019-05-03 15:29:44 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2019-05-03 15:29:44 +0200 |
| commit | 71ede7cb05ae35c90eccb80ffc413b4559ba7e60 (patch) | |
| tree | 73229c3e02655a9fd3c9f2bb987f44b226d65fc7 /frontends/ast/simplify.cc | |
| parent | 97423caddaafa0fbaca6f541a9c3e17f036b198b (diff) | |
| parent | 6bbe2fdbf32e6335cdbecc21547e54992c3a606d (diff) | |
| download | yosys-71ede7cb05ae35c90eccb80ffc413b4559ba7e60.tar.gz yosys-71ede7cb05ae35c90eccb80ffc413b4559ba7e60.tar.bz2 yosys-71ede7cb05ae35c90eccb80ffc413b4559ba7e60.zip | |
Merge pull request #976 from YosysHQ/clifford/fix974
Fix width detection of memory access with bit slice
Diffstat (limited to 'frontends/ast/simplify.cc')
| -rw-r--r-- | frontends/ast/simplify.cc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/frontends/ast/simplify.cc b/frontends/ast/simplify.cc index 4d4b9dfe1..d6561682a 100644 --- a/frontends/ast/simplify.cc +++ b/frontends/ast/simplify.cc @@ -1607,6 +1607,7 @@ skip_dynamic_range_lvalue_expansion:; current_scope[wire_tmp->str] = wire_tmp; wire_tmp->attributes["\\nosync"] = AstNode::mkconst_int(1, false); while (wire_tmp->simplify(true, false, false, 1, -1, false, false)) { } + wire_tmp->is_logic = true; AstNode *wire_tmp_id = new AstNode(AST_IDENTIFIER); wire_tmp_id->str = wire_tmp->str; |