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| author | Benedikt Tutzer <e1225461@student.tuwien.ac.at> | 2018-07-10 08:52:36 +0200 |
|---|---|---|
| committer | Benedikt Tutzer <e1225461@student.tuwien.ac.at> | 2018-07-10 08:52:36 +0200 |
| commit | e7d3f3cd464fe323872285bed40e6f347683147b (patch) | |
| tree | 04c4e11c0336afa2bc8f9dac2ba15f908380cc5d /kernel/rtlil.cc | |
| parent | 55df7fff19cfaa42197effc31ac8de07f9090924 (diff) | |
| download | yosys-e7d3f3cd464fe323872285bed40e6f347683147b.tar.gz yosys-e7d3f3cd464fe323872285bed40e6f347683147b.tar.bz2 yosys-e7d3f3cd464fe323872285bed40e6f347683147b.zip | |
added destructors for wires and cells
Diffstat (limited to 'kernel/rtlil.cc')
| -rw-r--r-- | kernel/rtlil.cc | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc index 5cef90206..6e8b51682 100644 --- a/kernel/rtlil.cc +++ b/kernel/rtlil.cc @@ -2223,6 +2223,13 @@ RTLIL::Wire::Wire() #endif } +RTLIL::Wire::~Wire() +{ +#ifdef WITH_PYTHON + RTLIL::Wire::get_all_wires()->erase(hashidx_); +#endif +} + #ifdef WITH_PYTHON static std::map<unsigned int, RTLIL::Wire*> *all_wires = new std::map<unsigned int, RTLIL::Wire*>(); std::map<unsigned int, RTLIL::Wire*> *RTLIL::Wire::get_all_wires(void) @@ -2256,6 +2263,13 @@ RTLIL::Cell::Cell() : module(nullptr) #endif } +RTLIL::Cell::~Cell() +{ +#ifdef WITH_PYTHON + RTLIL::Cell::get_all_cells()->erase(hashidx_); +#endif +} + #ifdef WITH_PYTHON static std::map<unsigned int, RTLIL::Cell*> *all_cells = new std::map<unsigned int, RTLIL::Cell*>(); std::map<unsigned int, RTLIL::Cell*> *RTLIL::Cell::get_all_cells(void) |