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| author | Clifford Wolf <clifford@clifford.at> | 2014-07-22 20:12:15 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2014-07-22 20:39:37 +0200 |
| commit | 16e5ae0b92ac4b7568cb11a769e612e152c0042e (patch) | |
| tree | e058904f41f560c8d84fe4c9c4fa4d9dd751497a /kernel/rtlil.h | |
| parent | a233762a815fc180b371f699e865a7d7aed77bca (diff) | |
| download | yosys-16e5ae0b92ac4b7568cb11a769e612e152c0042e.tar.gz yosys-16e5ae0b92ac4b7568cb11a769e612e152c0042e.tar.bz2 yosys-16e5ae0b92ac4b7568cb11a769e612e152c0042e.zip | |
SigSpec refactoring: renamed the SigSpec members to chunks_ and width_ and added accessor functions
Diffstat (limited to 'kernel/rtlil.h')
| -rw-r--r-- | kernel/rtlil.h | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/kernel/rtlil.h b/kernel/rtlil.h index 0919b3926..7fb416f1f 100644 --- a/kernel/rtlil.h +++ b/kernel/rtlil.h @@ -496,11 +496,17 @@ struct RTLIL::SigBit { }; struct RTLIL::SigSpec { -public: - std::vector<RTLIL::SigChunk> __chunks; // LSB at index 0 - int __width; +private: + std::vector<RTLIL::SigChunk> chunks_; // LSB at index 0 + int width_; public: + std::vector<RTLIL::SigChunk> &chunks() { return chunks_; } + const std::vector<RTLIL::SigChunk> &chunks() const { return chunks_; } + + int &size() { return width_; } + const int &size() const { return width_; } + SigSpec(); SigSpec(const RTLIL::Const &data); SigSpec(const RTLIL::SigChunk &chunk); |