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| author | Clifford Wolf <clifford@clifford.at> | 2014-01-29 15:56:58 +0100 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2014-01-29 15:56:58 +0100 |
| commit | 34b39ec28a81818cda0a77c448819ecbf9da3cce (patch) | |
| tree | fd3427cd341c8957e75e921655e7d0b9929df7a5 /manual/PRESENTATION_Intro | |
| parent | cbe77bf84465ea0c4120e865189b07329b862468 (diff) | |
| download | yosys-34b39ec28a81818cda0a77c448819ecbf9da3cce.tar.gz yosys-34b39ec28a81818cda0a77c448819ecbf9da3cce.tar.bz2 yosys-34b39ec28a81818cda0a77c448819ecbf9da3cce.zip | |
presentation progress
Diffstat (limited to 'manual/PRESENTATION_Intro')
| -rw-r--r-- | manual/PRESENTATION_Intro/counter.ys | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/manual/PRESENTATION_Intro/counter.ys b/manual/PRESENTATION_Intro/counter.ys index 68fe0308e..bcfe387e4 100644 --- a/manual/PRESENTATION_Intro/counter.ys +++ b/manual/PRESENTATION_Intro/counter.ys @@ -2,17 +2,17 @@ read_verilog counter.v hierarchy -check -top counter -show -format pdf -prefix counter_00 +show -stretch -format pdf -prefix counter_00 # the high-level stuff proc; opt; memory; opt; fsm; opt -show -format pdf -prefix counter_01 +show -stretch -format pdf -prefix counter_01 # mapping to internal cell library techmap; splitnets -ports; opt -show -format pdf -prefix counter_02 +show -stretch -format pdf -prefix counter_02 # mapping flip-flops to mycells.lib dfflibmap -liberty mycells.lib @@ -23,4 +23,4 @@ abc -liberty mycells.lib # cleanup clean -show -lib mycells.v -format pdf -prefix counter_03 +show -stretch -lib mycells.v -format pdf -prefix counter_03 |