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| author | Clifford Wolf <clifford@clifford.at> | 2014-07-23 15:36:09 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2014-07-23 15:36:09 +0200 |
| commit | 4e802eb7f6fe5858f8657be7cd3e6638cc0f2ece (patch) | |
| tree | 917ce7eece77475cfc632f3d41f5fb8aadef64d2 /passes/techmap/techmap.cc | |
| parent | 85db102e13bbd6decda3f99ef640d0991ee24b33 (diff) | |
| download | yosys-4e802eb7f6fe5858f8657be7cd3e6638cc0f2ece.tar.gz yosys-4e802eb7f6fe5858f8657be7cd3e6638cc0f2ece.tar.bz2 yosys-4e802eb7f6fe5858f8657be7cd3e6638cc0f2ece.zip | |
Fixed all users of SigSpec::chunks_rw() and removed it
Diffstat (limited to 'passes/techmap/techmap.cc')
| -rw-r--r-- | passes/techmap/techmap.cc | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/passes/techmap/techmap.cc b/passes/techmap/techmap.cc index f3b1a0ef7..8d7b21e0f 100644 --- a/passes/techmap/techmap.cc +++ b/passes/techmap/techmap.cc @@ -41,14 +41,15 @@ static void apply_prefix(std::string prefix, std::string &id) static void apply_prefix(std::string prefix, RTLIL::SigSpec &sig, RTLIL::Module *module) { - for (size_t i = 0; i < sig.chunks().size(); i++) { - if (sig.chunks()[i].wire == NULL) - continue; - std::string wire_name = sig.chunks()[i].wire->name; - apply_prefix(prefix, wire_name); - assert(module->wires.count(wire_name) > 0); - sig.chunks_rw()[i].wire = module->wires[wire_name]; - } + std::vector<RTLIL::SigChunk> chunks = sig; + for (auto &chunk : chunks) + if (chunk.wire != NULL) { + std::string wire_name = chunk.wire->name; + apply_prefix(prefix, wire_name); + assert(module->wires.count(wire_name) > 0); + chunk.wire = module->wires[wire_name]; + } + sig = chunks; } struct TechmapWorker |