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author | N. Engelhardt <nak@symbioticeda.com> | 2020-01-03 12:28:48 +0100 |
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committer | N. Engelhardt <nak@symbioticeda.com> | 2020-01-03 12:28:48 +0100 |
commit | 341fd872b59e8f95aa14afd9f17225d2c03a4283 (patch) | |
tree | 21802e73ca767d124971d43d3f78d9f4cf7d62e2 /techlibs/anlogic/Makefile.inc | |
parent | c8bc1793a4e8230c29fca4a34862414e8ab8722b (diff) | |
parent | f8d5920a7e61f78873b7bf49dd7e8f3a83f7adf3 (diff) | |
download | yosys-341fd872b59e8f95aa14afd9f17225d2c03a4283.tar.gz yosys-341fd872b59e8f95aa14afd9f17225d2c03a4283.tar.bz2 yosys-341fd872b59e8f95aa14afd9f17225d2c03a4283.zip |
Merge branch 'master' of https://github.com/YosysHQ/yosys into abc_scratchpad_script
Diffstat (limited to 'techlibs/anlogic/Makefile.inc')
-rw-r--r-- | techlibs/anlogic/Makefile.inc | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/techlibs/anlogic/Makefile.inc b/techlibs/anlogic/Makefile.inc index 9426b5ca5..2d8d65e2e 100644 --- a/techlibs/anlogic/Makefile.inc +++ b/techlibs/anlogic/Makefile.inc @@ -7,6 +7,6 @@ $(eval $(call add_share_file,share/anlogic,techlibs/anlogic/cells_map.v)) $(eval $(call add_share_file,share/anlogic,techlibs/anlogic/arith_map.v)) $(eval $(call add_share_file,share/anlogic,techlibs/anlogic/cells_sim.v)) $(eval $(call add_share_file,share/anlogic,techlibs/anlogic/eagle_bb.v)) -$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/drams.txt)) -$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/drams_map.v)) -$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/dram_init_16x4.vh)) +$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/lutrams.txt)) +$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/lutrams_map.v)) +$(eval $(call add_share_file,share/anlogic,techlibs/anlogic/lutram_init_16x4.vh)) |