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| author | Eddie Hung <eddie@fpgeh.com> | 2019-12-30 16:01:38 -0800 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-12-30 16:01:38 -0800 |
| commit | 658f424d7d1bc73b00db766f02a89cdc833aa9bf (patch) | |
| tree | 92e445a1fb8d6d76460f854b5b1179dc6599595b /techlibs/ecp5/synth_ecp5.cc | |
| parent | f348ffa44d4ec00537499ffe79ce627beeeefe85 (diff) | |
| parent | 22fe931c861aa3f557327baf9d12ec57006308d9 (diff) | |
| download | yosys-658f424d7d1bc73b00db766f02a89cdc833aa9bf.tar.gz yosys-658f424d7d1bc73b00db766f02a89cdc833aa9bf.tar.bz2 yosys-658f424d7d1bc73b00db766f02a89cdc833aa9bf.zip | |
Merge remote-tracking branch 'origin/master' into eddie/abc9_refactor
Diffstat (limited to 'techlibs/ecp5/synth_ecp5.cc')
| -rw-r--r-- | techlibs/ecp5/synth_ecp5.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/techlibs/ecp5/synth_ecp5.cc b/techlibs/ecp5/synth_ecp5.cc index b71bb2395..a0ea6d1f9 100644 --- a/techlibs/ecp5/synth_ecp5.cc +++ b/techlibs/ecp5/synth_ecp5.cc @@ -230,7 +230,7 @@ struct SynthEcp5Pass : public ScriptPass { if (check_label("begin")) { - run("read_verilog -D_ABC -lib +/ecp5/cells_sim.v +/ecp5/cells_bb.v"); + run("read_verilog -lib +/ecp5/cells_sim.v +/ecp5/cells_bb.v"); run(stringf("hierarchy -check %s", help_mode ? "-top <top>" : top_opt.c_str())); } |