diff options
| author | Clifford Wolf <clifford@clifford.at> | 2015-04-26 08:39:31 +0200 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2015-04-26 08:39:31 +0200 |
| commit | 752851954b8330b3f4f443f799b3b121f416b51e (patch) | |
| tree | 1737b7bac591a7020ead5fa60b5bc212c17b75b1 /techlibs/ice40/tests/test_bram.v | |
| parent | b4d7a590e8d6ab5034adf9a34c1ef4a3b3c2a708 (diff) | |
| download | yosys-752851954b8330b3f4f443f799b3b121f416b51e.tar.gz yosys-752851954b8330b3f4f443f799b3b121f416b51e.tar.bz2 yosys-752851954b8330b3f4f443f799b3b121f416b51e.zip | |
Initialization support for all iCE40 bram modes
Diffstat (limited to 'techlibs/ice40/tests/test_bram.v')
| -rw-r--r-- | techlibs/ice40/tests/test_bram.v | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/techlibs/ice40/tests/test_bram.v b/techlibs/ice40/tests/test_bram.v index a625b6b66..320735d07 100644 --- a/techlibs/ice40/tests/test_bram.v +++ b/techlibs/ice40/tests/test_bram.v @@ -14,8 +14,7 @@ module bram #( reg [DBITS-1:0] memory [0:2**ABITS-1]; initial begin - if (INIT_ADDR || INIT_DATA) - memory[INIT_ADDR] <= INIT_DATA; + memory[INIT_ADDR] <= INIT_DATA; end always @(posedge clk) begin |