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| author | Eddie Hung <eddie@fpgeh.com> | 2019-08-23 11:32:44 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-08-23 11:32:44 -0700 |
| commit | 78b7d8f531cfec661931c08547d90b3f08ae65b3 (patch) | |
| tree | c5d79308fabd04ff69b589a0753e4b56ac07408e /techlibs/ice40 | |
| parent | 2b37a093e95036b267481b2dae2046278eef4040 (diff) | |
| parent | 509c353fe981c95ca667a637bf2b47477962a60b (diff) | |
| download | yosys-78b7d8f531cfec661931c08547d90b3f08ae65b3.tar.gz yosys-78b7d8f531cfec661931c08547d90b3f08ae65b3.tar.bz2 yosys-78b7d8f531cfec661931c08547d90b3f08ae65b3.zip | |
Merge remote-tracking branch 'origin/master' into eddie/xilinx_srl
Diffstat (limited to 'techlibs/ice40')
| -rw-r--r-- | techlibs/ice40/cells_sim.v | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/techlibs/ice40/cells_sim.v b/techlibs/ice40/cells_sim.v index ab04808f4..c7f3bdad2 100644 --- a/techlibs/ice40/cells_sim.v +++ b/techlibs/ice40/cells_sim.v @@ -143,11 +143,13 @@ endmodule (* abc_box_id = 1, lib_whitebox *) module \$__ICE40_FULL_ADDER ( - (* abc_carry *) output CO, + (* abc_carry *) + output CO, output O, input A, input B, - (* abc_carry *) input CI + (* abc_carry *) + input CI ); SB_CARRY carry ( .I0(A), |