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| author | Eddie Hung <eddie@fpgeh.com> | 2019-04-17 15:19:02 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-04-17 15:19:02 -0700 |
| commit | c795e14d25b42ae28bd4b8f7e259e969442437b3 (patch) | |
| tree | 622891f15e8a5a3ef7bca4b263c4889294ad0481 /techlibs/ice40 | |
| parent | abcd3103ffa8965160e2d489c81e0a61c9a937bd (diff) | |
| download | yosys-c795e14d25b42ae28bd4b8f7e259e969442437b3.tar.gz yosys-c795e14d25b42ae28bd4b8f7e259e969442437b3.tar.bz2 yosys-c795e14d25b42ae28bd4b8f7e259e969442437b3.zip | |
Reduce to three devices: hx, lp, u
Diffstat (limited to 'techlibs/ice40')
| -rw-r--r-- | techlibs/ice40/hx.box (renamed from techlibs/ice40/hx8k.box) | 0 | ||||
| -rw-r--r-- | techlibs/ice40/hx.lut (renamed from techlibs/ice40/hx8k.lut) | 0 | ||||
| -rw-r--r-- | techlibs/ice40/lp.box | 13 | ||||
| -rw-r--r-- | techlibs/ice40/lp.lut | 6 | ||||
| -rw-r--r-- | techlibs/ice40/synth_ice40.cc | 8 | ||||
| -rw-r--r-- | techlibs/ice40/u.box (renamed from techlibs/ice40/up5k.box) | 0 | ||||
| -rw-r--r-- | techlibs/ice40/u.lut (renamed from techlibs/ice40/up5k.lut) | 0 |
7 files changed, 23 insertions, 4 deletions
diff --git a/techlibs/ice40/hx8k.box b/techlibs/ice40/hx.box index c31f7bf39..c31f7bf39 100644 --- a/techlibs/ice40/hx8k.box +++ b/techlibs/ice40/hx.box diff --git a/techlibs/ice40/hx8k.lut b/techlibs/ice40/hx.lut index 3b3bb11e2..3b3bb11e2 100644 --- a/techlibs/ice40/hx8k.lut +++ b/techlibs/ice40/hx.lut diff --git a/techlibs/ice40/lp.box b/techlibs/ice40/lp.box new file mode 100644 index 000000000..7eb8e86e0 --- /dev/null +++ b/techlibs/ice40/lp.box @@ -0,0 +1,13 @@ +# From https://github.com/cliffordwolf/icestorm/blob/be0bca0/icefuzz/timings_lp8k.txt + +# NB: Inputs/Outputs must be ordered alphabetically + +# Inputs: CI I0 I1 +# Outputs: CO +SB_CARRY 1 1 3 1 +186 675 609 + +# Inputs: I0 I1 I2 I3 +# Outputs: O +SB_LUT4 2 1 4 1 +465 558 589 661 diff --git a/techlibs/ice40/lp.lut b/techlibs/ice40/lp.lut new file mode 100644 index 000000000..e72f760a2 --- /dev/null +++ b/techlibs/ice40/lp.lut @@ -0,0 +1,6 @@ +# From https://github.com/cliffordwolf/icestorm/blob/be0bca0/icefuzz/timings_lp8k.txt +# I3 I2 I1 I0 +1 1 465 +2 1 465 558 +3 1 465 558 589 +4 1 465 558 589 661 diff --git a/techlibs/ice40/synth_ice40.cc b/techlibs/ice40/synth_ice40.cc index 62589ad87..7c95588e4 100644 --- a/techlibs/ice40/synth_ice40.cc +++ b/techlibs/ice40/synth_ice40.cc @@ -37,9 +37,9 @@ struct SynthIce40Pass : public ScriptPass log("\n"); log("This command runs synthesis for iCE40 FPGAs.\n"); log("\n"); - log(" -device < hx1k | lp384 | lp1k | lp8k | hx8k | u4k | up5k >\n"); + log(" -device < hx | lp | u >\n"); log(" optimise the synthesis netlist for the specified device.\n"); - log(" HX1K is the default target if no device argument specified.\n"); + log(" HX is the default target if no device argument specified.\n"); log("\n"); log(" -top <module>\n"); log(" use the specified module as top module\n"); @@ -128,7 +128,7 @@ struct SynthIce40Pass : public ScriptPass abc2 = false; vpr = false; abc = "abc"; - device_opt = "hx1k"; + device_opt = "hx"; } void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE @@ -225,7 +225,7 @@ struct SynthIce40Pass : public ScriptPass if (!design->full_selection()) log_cmd_error("This command only operates on fully selected designs!\n"); - if (device_opt != "hx1k" && device_opt !="lp384" && device_opt != "lp1k" && device_opt !="lp8k" && device_opt !="hx8k" && device_opt != "u4k" && device_opt != "up5k") + if (device_opt != "hx" && device_opt != "lp" && device_opt !="u") log_cmd_error("Invalid or no device specified: '%s'\n", device_opt.c_str()); log_header(design, "Executing SYNTH_ICE40 pass.\n"); diff --git a/techlibs/ice40/up5k.box b/techlibs/ice40/u.box index 94df1df8f..94df1df8f 100644 --- a/techlibs/ice40/up5k.box +++ b/techlibs/ice40/u.box diff --git a/techlibs/ice40/up5k.lut b/techlibs/ice40/u.lut index 1e4fcadb6..1e4fcadb6 100644 --- a/techlibs/ice40/up5k.lut +++ b/techlibs/ice40/u.lut |