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| author | Eddie Hung <eddie@fpgeh.com> | 2020-02-05 10:47:31 -0800 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2020-02-05 10:47:31 -0800 |
| commit | b6a1f627b5871e750fe6a559fbb42334c7de8b84 (patch) | |
| tree | f1b284aebe30d0f7eabd9e8919b4275a38ff2ae4 /techlibs/intel/synth_intel.cc | |
| parent | 5aaa19f1ab33394accbe633cd96a3fbe281dd09a (diff) | |
| parent | 5ebdc0f8e07989b79337ced0553bd28819a8cf3e (diff) | |
| download | yosys-b6a1f627b5871e750fe6a559fbb42334c7de8b84.tar.gz yosys-b6a1f627b5871e750fe6a559fbb42334c7de8b84.tar.bz2 yosys-b6a1f627b5871e750fe6a559fbb42334c7de8b84.zip | |
Merge remote-tracking branch 'origin/master' into eddie/shiftx2mux
Diffstat (limited to 'techlibs/intel/synth_intel.cc')
| -rw-r--r-- | techlibs/intel/synth_intel.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/techlibs/intel/synth_intel.cc b/techlibs/intel/synth_intel.cc index 2ebb8bf50..3689df70e 100644 --- a/techlibs/intel/synth_intel.cc +++ b/techlibs/intel/synth_intel.cc @@ -26,7 +26,7 @@ USING_YOSYS_NAMESPACE PRIVATE_NAMESPACE_BEGIN struct SynthIntelPass : public ScriptPass { - SynthIntelPass() : ScriptPass("synth_intel", "synthesis for Intel (Altera) FPGAs.") {} + SynthIntelPass() : ScriptPass("synth_intel", "synthesis for Intel (Altera) FPGAs.") { experimental(); } void help() YS_OVERRIDE { |