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author | Eddie Hung <eddie@fpgeh.com> | 2019-11-19 15:40:39 -0800 |
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committer | Eddie Hung <eddie@fpgeh.com> | 2019-11-19 15:40:39 -0800 |
commit | 09ee96e8c22ec692ee3ee31b8c211646eabbcf27 (patch) | |
tree | 8b24dad9db0013ee3db20326b00941bd2abb10d1 /techlibs/xilinx/Makefile.inc | |
parent | 304e5f9ea45b8a4e2a28aba7f2820d1862377fef (diff) | |
parent | 7ea0a5937ba2572f6d9d62e73e24df480c49561d (diff) | |
download | yosys-09ee96e8c22ec692ee3ee31b8c211646eabbcf27.tar.gz yosys-09ee96e8c22ec692ee3ee31b8c211646eabbcf27.tar.bz2 yosys-09ee96e8c22ec692ee3ee31b8c211646eabbcf27.zip |
Merge remote-tracking branch 'origin/master' into xaig_dff
Diffstat (limited to 'techlibs/xilinx/Makefile.inc')
-rw-r--r-- | techlibs/xilinx/Makefile.inc | 22 |
1 files changed, 13 insertions, 9 deletions
diff --git a/techlibs/xilinx/Makefile.inc b/techlibs/xilinx/Makefile.inc index 0ae67d9e7..3ebc72fe8 100644 --- a/techlibs/xilinx/Makefile.inc +++ b/techlibs/xilinx/Makefile.inc @@ -13,7 +13,7 @@ EXTRA_OBJS += techlibs/xilinx/brams_init.mk techlibs/xilinx/brams_init.mk: techlibs/xilinx/brams_init.py $(Q) mkdir -p techlibs/xilinx - $(P) python3 $< + $(P) $(PYTHON_EXECUTABLE) $< $(Q) touch $@ techlibs/xilinx/brams_init_36.vh: techlibs/xilinx/brams_init.mk @@ -25,16 +25,14 @@ techlibs/xilinx/brams_init_8.vh: techlibs/xilinx/brams_init.mk $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/cells_map.v)) $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/cells_sim.v)) -$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xc6s_cells_xtra.v)) -$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xc6v_cells_xtra.v)) -$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xc7_cells_xtra.v)) -$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xcu_cells_xtra.v)) +$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/cells_xtra.v)) $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xc6s_brams.txt)) $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xc6s_brams_map.v)) -$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xc6s_brams_bb.v)) -$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xc7_brams.txt)) +$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xc7_xcu_brams.txt)) $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xc7_brams_map.v)) -$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xc7_brams_bb.v)) +$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xcu_brams_map.v)) +$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xcup_urams.txt)) +$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xcup_urams_map.v)) $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/lutrams.txt)) $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/lutrams_map.v)) $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/arith_map.v)) @@ -42,7 +40,13 @@ $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xc6s_ff_map.v)) $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xc7_ff_map.v)) $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/lut_map.v)) $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/mux_map.v)) -$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/dsp_map.v)) +$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xc3s_mult_map.v)) +$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xc3sda_dsp_map.v)) +$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xc6s_dsp_map.v)) +$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xc4v_dsp_map.v)) +$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xc5v_dsp_map.v)) +$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xc7_dsp_map.v)) +$(eval $(call add_share_file,share/xilinx,techlibs/xilinx/xcu_dsp_map.v)) $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc9_map.v)) $(eval $(call add_share_file,share/xilinx,techlibs/xilinx/abc9_unmap.v)) |