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| author | Eddie Hung <eddie@fpgeh.com> | 2019-04-09 14:32:10 -0700 |
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| committer | Eddie Hung <eddie@fpgeh.com> | 2019-04-09 14:32:10 -0700 |
| commit | b9e19071b8596b8d06b99cbb653325c0c9dc330f (patch) | |
| tree | 4be4df07491cf9ae6abec2983c53ba93ac00c54a /techlibs/xilinx/Makefile.inc | |
| parent | d536379c62d926967d5e7743b32990167f91e762 (diff) | |
| download | yosys-b9e19071b8596b8d06b99cbb653325c0c9dc330f.tar.gz yosys-b9e19071b8596b8d06b99cbb653325c0c9dc330f.tar.bz2 yosys-b9e19071b8596b8d06b99cbb653325c0c9dc330f.zip | |
Add delays to cells.box
Diffstat (limited to 'techlibs/xilinx/Makefile.inc')
0 files changed, 0 insertions, 0 deletions