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authorEddie Hung <eddie@fpgeh.com>2019-08-30 09:50:20 -0700
committerEddie Hung <eddie@fpgeh.com>2019-08-30 09:50:20 -0700
commit295c18bd6b8d3fa503041904f7f7df392a4b5167 (patch)
tree9a20c23d61a5c714ca8408c40d2e71345deff088 /techlibs/xilinx/synth_xilinx.cc
parent4cc74346f11e96b9a2bce1c984c674a22771a00a (diff)
parent6919c0f9b010c94a0a1a31cd788301e78a1bcbfb (diff)
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Merge branch 'xc7dsp' of github.com:YosysHQ/yosys into xc7dsp
Diffstat (limited to 'techlibs/xilinx/synth_xilinx.cc')
-rw-r--r--techlibs/xilinx/synth_xilinx.cc53
1 files changed, 52 insertions, 1 deletions
diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc
index 26d01ce40..5e491b86b 100644
--- a/techlibs/xilinx/synth_xilinx.cc
+++ b/techlibs/xilinx/synth_xilinx.cc
@@ -63,6 +63,9 @@ struct SynthXilinxPass : public ScriptPass
log(" generate an output netlist (and BLIF file) suitable for VPR\n");
log(" (this feature is experimental and incomplete)\n");
log("\n");
+ log(" -ise\n");
+ log(" generate an output netlist suitable for ISE (enables -iopad)\n");
+ log("\n");
log(" -nobram\n");
log(" do not use block RAM cells in output netlist\n");
log("\n");
@@ -80,6 +83,14 @@ struct SynthXilinxPass : public ScriptPass
log("\n");
log(" -nodsp\n");
log(" do not use DSP48E1s to implement multipliers and associated logic\n");
+ log(" -iopad\n");
+ log(" enable I/O buffer insertion (selected automatically by -ise)\n");
+ log("\n");
+ log(" -noiopad\n");
+ log(" disable I/O buffer insertion (only useful with -ise)\n");
+ log("\n");
+ log(" -noclkbuf\n");
+ log(" disable automatic clock buffer insertion\n");
log("\n");
log(" -widemux <int>\n");
log(" enable inference of hard multiplexer resources (MUXF[78]) for muxes at or\n");
@@ -107,7 +118,8 @@ struct SynthXilinxPass : public ScriptPass
}
std::string top_opt, edif_file, blif_file, family;
- bool flatten, retime, vpr, nobram, nolutram, nosrl, nocarry, nowidelut, nodsp, abc9;
+ bool flatten, retime, vpr, ise, iopad, noiopad, noclkbuf, nobram, nolutram, nosrl, nocarry, nowidelut, nodsp, abc9;
+ bool flatten_before_abc;
int widemux;
void clear_flags() YS_OVERRIDE
@@ -119,6 +131,10 @@ struct SynthXilinxPass : public ScriptPass
flatten = false;
retime = false;
vpr = false;
+ ise = false;
+ iopad = false;
+ noiopad = false;
+ noclkbuf = false;
nocarry = false;
nobram = false;
nolutram = false;
@@ -127,6 +143,7 @@ struct SynthXilinxPass : public ScriptPass
nowidelut = false;
nodsp = false;
abc9 = false;
+ flatten_before_abc = false;
widemux = 0;
}
@@ -166,6 +183,10 @@ struct SynthXilinxPass : public ScriptPass
flatten = true;
continue;
}
+ if (args[argidx] == "-flatten_before_abc") {
+ flatten_before_abc = true;
+ continue;
+ }
if (args[argidx] == "-retime") {
retime = true;
continue;
@@ -182,6 +203,22 @@ struct SynthXilinxPass : public ScriptPass
vpr = true;
continue;
}
+ if (args[argidx] == "-ise") {
+ ise = true;
+ continue;
+ }
+ if (args[argidx] == "-iopad") {
+ iopad = true;
+ continue;
+ }
+ if (args[argidx] == "-noiopad") {
+ noiopad = true;
+ continue;
+ }
+ if (args[argidx] == "-noclkbuf") {
+ noclkbuf = true;
+ continue;
+ }
if (args[argidx] == "-nocarry") {
nocarry = true;
continue;
@@ -407,6 +444,8 @@ struct SynthXilinxPass : public ScriptPass
if (check_label("map_luts")) {
run("opt_expr -mux_undef");
+ if (flatten_before_abc)
+ run("flatten");
if (help_mode)
run("abc -luts 2:2,3,6:5[,10,20] [-dff]", "(option for 'nowidelut', option for '-retime')");
else if (abc9) {
@@ -435,6 +474,18 @@ struct SynthXilinxPass : public ScriptPass
run("clean");
}
+ if (check_label("finalize")) {
+ bool do_iopad = iopad || (ise && !noiopad);
+ if (help_mode || !noclkbuf) {
+ if (help_mode || do_iopad)
+ run("clkbufmap -buf BUFG O:I -inpad IBUFG O:I", "(skip if '-noclkbuf', '-inpad' passed if '-iopad' or '-ise' and not '-noiopad')");
+ else
+ run("clkbufmap -buf BUFG O:I");
+ }
+ if (do_iopad)
+ run("iopadmap -bits -outpad OBUF I:O -inpad IBUF O:I A:top", "(only if '-iopad' or '-ise' and not '-noiopad')");
+ }
+
if (check_label("check")) {
run("hierarchy -check");
run("stat -tech xilinx");