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authorDavid Shah <dave@ds0.me>2019-10-18 14:02:57 +0100
committerDavid Shah <dave@ds0.me>2019-10-23 11:47:44 +0100
commit3506eaf2904cddf5132c598a527e050a79a181d5 (patch)
treec5909467e7a42fa6b69b0e49d440a787bc36e3c5 /techlibs/xilinx/synth_xilinx.cc
parent6769d31ddbab341940af9b42b538fca60797fdf4 (diff)
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xilinx: Add URAM288 mapping for xcup
Signed-off-by: David Shah <dave@ds0.me>
Diffstat (limited to 'techlibs/xilinx/synth_xilinx.cc')
-rw-r--r--techlibs/xilinx/synth_xilinx.cc24
1 files changed, 23 insertions, 1 deletions
diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc
index 825addf84..69b071d34 100644
--- a/techlibs/xilinx/synth_xilinx.cc
+++ b/techlibs/xilinx/synth_xilinx.cc
@@ -93,6 +93,9 @@ struct SynthXilinxPass : public ScriptPass
log(" -noclkbuf\n");
log(" disable automatic clock buffer insertion\n");
log("\n");
+ log(" -uram\n");
+ log(" infer URAM288s for large memories (xcup only)\n");
+ log("\n");
log(" -widemux <int>\n");
log(" enable inference of hard multiplexer resources (MUXF[78]) for muxes at or\n");
log(" above this number of inputs (minimum value 2, recommended value >= 5).\n");
@@ -119,7 +122,7 @@ struct SynthXilinxPass : public ScriptPass
}
std::string top_opt, edif_file, blif_file, family;
- bool flatten, retime, vpr, ise, iopad, noiopad, noclkbuf, nobram, nolutram, nosrl, nocarry, nowidelut, nodsp, abc9;
+ bool flatten, retime, vpr, ise, iopad, noiopad, noclkbuf, nobram, nolutram, nosrl, nocarry, nowidelut, nodsp, uram, abc9;
bool flatten_before_abc;
int widemux;
@@ -143,6 +146,7 @@ struct SynthXilinxPass : public ScriptPass
nocarry = false;
nowidelut = false;
nodsp = false;
+ uram = false;
abc9 = false;
flatten_before_abc = false;
widemux = 0;
@@ -248,6 +252,10 @@ struct SynthXilinxPass : public ScriptPass
nodsp = true;
continue;
}
+ if (args[argidx] == "-uram") {
+ uram = true;
+ continue;
+ }
break;
}
extra_args(args, argidx, design);
@@ -410,6 +418,20 @@ struct SynthXilinxPass : public ScriptPass
run("opt_clean");
}
+ if (check_label("map_uram", "(only if '-uram')")) {
+ if (help_mode) {
+ run("memory_bram -rules +/xilinx/{family}_urams.txt");
+ run("techmap -map +/xilinx/{family}_urams_map.v");
+ } else if (uram) {
+ if (family == "xcup") {
+ run("memory_bram -rules +/xilinx/xcup_urams.txt");
+ run("techmap -map +/xilinx/xcup_urams_map.v");
+ } else {
+ log_warning("UltraRAM inference not supported for family %s.\n", family.c_str());
+ }
+ }
+ }
+
if (check_label("map_bram", "(skip if '-nobram')")) {
if (help_mode) {
run("memory_bram -rules +/xilinx/{family}_brams.txt");