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| author | Eddie Hung <eddie@fpgeh.com> | 2020-01-14 11:34:40 -0800 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2020-01-14 11:34:40 -0800 |
| commit | 36d1a2c60ff8179d9cfbdb1ae0ca5dd5d883991a (patch) | |
| tree | b13dd87d93e0b4b1675d14c0eaf869aec3e67058 /techlibs/xilinx | |
| parent | ca2f3db53f3f330d283079bf44b3cef6b7f197be (diff) | |
| download | yosys-36d1a2c60ff8179d9cfbdb1ae0ca5dd5d883991a.tar.gz yosys-36d1a2c60ff8179d9cfbdb1ae0ca5dd5d883991a.tar.bz2 yosys-36d1a2c60ff8179d9cfbdb1ae0ca5dd5d883991a.zip | |
synth_xilinx: fix default W value for non-xc7
Diffstat (limited to 'techlibs/xilinx')
| -rw-r--r-- | techlibs/xilinx/synth_xilinx.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc index d916093dc..b86484e71 100644 --- a/techlibs/xilinx/synth_xilinx.cc +++ b/techlibs/xilinx/synth_xilinx.cc @@ -562,7 +562,7 @@ struct SynthXilinxPass : public ScriptPass if (active_design->scratchpad.count(k)) abc9_opts += stringf(" -W %s", active_design->scratchpad_get_string(k).c_str()); else - abc9_opts += stringf(" -W %s", RTLIL::constpad.at(k).c_str()); + abc9_opts += stringf(" -W %s", RTLIL::constpad.at(k, RTLIL::constpad.at("synth_xilinx.abc9.xc7.W")).c_str()); if (nowidelut) abc9_opts += " -lut +/xilinx/abc9_xc7_nowide.lut"; else |