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| author | Eddie Hung <eddie@fpgeh.com> | 2019-05-02 11:00:49 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-05-02 11:00:49 -0700 |
| commit | 3b5e8c86a4516c202e877ee5ca154062682e15b9 (patch) | |
| tree | 378bcafbb502c9424a6b9b79c50bb2f0f0db52c0 /techlibs | |
| parent | 5cd19b52da297cc7d44e9bf11dc9d1664a02ccce (diff) | |
| download | yosys-3b5e8c86a4516c202e877ee5ca154062682e15b9.tar.gz yosys-3b5e8c86a4516c202e877ee5ca154062682e15b9.tar.bz2 yosys-3b5e8c86a4516c202e877ee5ca154062682e15b9.zip | |
Fix -nocarry
Diffstat (limited to 'techlibs')
| -rw-r--r-- | techlibs/xilinx/synth_xilinx.cc | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc index bde95c638..a0e77021a 100644 --- a/techlibs/xilinx/synth_xilinx.cc +++ b/techlibs/xilinx/synth_xilinx.cc @@ -241,10 +241,10 @@ struct SynthXilinxPass : public ScriptPass run("dff2dffe"); run("opt -full"); - if (!vpr || help_mode) - run("techmap -map +/xilinx/arith_map.v"); - else + if (vpr && !nocarry && !help_mode) run("techmap -map +/xilinx/arith_map.v -D _EXPLICIT_CARRY"); + else if (!nocarry || help_mode) + run("techmap -map +/xilinx/arith_map.v", "(skip if '-nocarry')"); if (!nosrl || help_mode) { // shregmap operates on bit-level flops, not word-level, |