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author | Clifford Wolf <clifford@clifford.at> | 2016-11-03 12:13:23 +0100 |
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committer | Clifford Wolf <clifford@clifford.at> | 2016-11-03 12:13:23 +0100 |
commit | 3db2ac4e0036d5ebdc0d81eb61ae0241a18f7c6f (patch) | |
tree | 9dc7bcf109c5de545221c440a9dd4e7d2cd9a6f4 /techlibs | |
parent | e3330fb98f80c7cbd233bc1bb8e49bc8b4d27bab (diff) | |
download | yosys-3db2ac4e0036d5ebdc0d81eb61ae0241a18f7c6f.tar.gz yosys-3db2ac4e0036d5ebdc0d81eb61ae0241a18f7c6f.tar.bz2 yosys-3db2ac4e0036d5ebdc0d81eb61ae0241a18f7c6f.zip |
Added hex constant support to write_verilog
Diffstat (limited to 'techlibs')
-rw-r--r-- | techlibs/gowin/synth_gowin.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/techlibs/gowin/synth_gowin.cc b/techlibs/gowin/synth_gowin.cc index 129ab8393..44dec265d 100644 --- a/techlibs/gowin/synth_gowin.cc +++ b/techlibs/gowin/synth_gowin.cc @@ -169,7 +169,7 @@ struct SynthGowinPass : public ScriptPass if (check_label("vout")) { if (!vout_file.empty() || help_mode) - run(stringf("write_verilog -attr2comment -defparam -renameprefix gen %s", + run(stringf("write_verilog -nodec -attr2comment -defparam -renameprefix gen %s", help_mode ? "<file-name>" : vout_file.c_str())); } } |