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| author | Sylvain Munaut <tnt@246tNt.com> | 2019-05-13 12:51:06 +0200 |
|---|---|---|
| committer | Sylvain Munaut <tnt@246tNt.com> | 2019-05-13 12:51:06 +0200 |
| commit | 4f9183d10747c6889ea7d1468dbb6f69844714e6 (patch) | |
| tree | 5a24b8c20a2d881df3cb8a82ccd96eddc93ea682 /techlibs | |
| parent | 5772732a6d24bbf1a46301f03623567079316f7a (diff) | |
| download | yosys-4f9183d10747c6889ea7d1468dbb6f69844714e6.tar.gz yosys-4f9183d10747c6889ea7d1468dbb6f69844714e6.tar.bz2 yosys-4f9183d10747c6889ea7d1468dbb6f69844714e6.zip | |
ice40/cells_sim.v: Add support for TRIM input to SB_HFOSC
Signed-off-by: Sylvain Munaut <tnt@246tNt.com>
Diffstat (limited to 'techlibs')
| -rw-r--r-- | techlibs/ice40/cells_sim.v | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/techlibs/ice40/cells_sim.v b/techlibs/ice40/cells_sim.v index 00843b97c..e89405b22 100644 --- a/techlibs/ice40/cells_sim.v +++ b/techlibs/ice40/cells_sim.v @@ -930,10 +930,21 @@ endmodule (* blackbox *) module SB_HFOSC( + input TRIM0, + input TRIM1, + input TRIM2, + input TRIM3, + input TRIM4, + input TRIM5, + input TRIM6, + input TRIM7, + input TRIM8, + input TRIM9, input CLKHFPU, input CLKHFEN, output CLKHF ); +parameter TRIM_EN = "0b0"; parameter CLKHF_DIV = "0b00"; endmodule |