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| author | Diego H <diego@symbioticeda.com> | 2019-12-12 17:32:58 -0600 |
|---|---|---|
| committer | Diego H <diego@symbioticeda.com> | 2019-12-12 17:32:58 -0600 |
| commit | 751a18d7e974123352e372c75bb17226e6fabec0 (patch) | |
| tree | 87f644392b8be91788a3af73620a75e93838748c /techlibs | |
| parent | e33f407655fa516cb2f6754103973eb156ca90cf (diff) | |
| download | yosys-751a18d7e974123352e372c75bb17226e6fabec0.tar.gz yosys-751a18d7e974123352e372c75bb17226e6fabec0.tar.bz2 yosys-751a18d7e974123352e372c75bb17226e6fabec0.zip | |
Fixing citation in xc7_xcu_brams.txt file. Fixing RAMB36E1 test.
Diffstat (limited to 'techlibs')
| -rw-r--r-- | techlibs/xilinx/xc7_xcu_brams.txt | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/techlibs/xilinx/xc7_xcu_brams.txt b/techlibs/xilinx/xc7_xcu_brams.txt index 87e659bbc..b7c893ff7 100644 --- a/techlibs/xilinx/xc7_xcu_brams.txt +++ b/techlibs/xilinx/xc7_xcu_brams.txt @@ -1,4 +1,3 @@ - bram $__XILINX_RAMB36_SDP init 1 abits 9 @@ -72,6 +71,11 @@ bram $__XILINX_RAMB18_TDP clkpol 2 3 endbram +# The "min bits" value were taken from: +# [[CITE]] 7 Series FPGAs Memory Resources User Guide (UG473), +# v1.14 ed., p 29-30, July, 2019. +# https://www.xilinx.com/support/documentation/user_guides/ug473_7Series_Memory_Resources.pdf + match $__XILINX_RAMB36_SDP min bits 1024 min efficiency 5 @@ -102,7 +106,3 @@ match $__XILINX_RAMB18_TDP shuffle_enable B make_transp endmatch - -# [[CITE]] 7 Series FPGAs Memory Resources User Guide (UG473), -# v1.14 ed., p 29-30, July, 2019. - |