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author | N. Engelhardt <nak@symbioticeda.com> | 2020-03-06 16:45:36 +0100 |
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committer | N. Engelhardt <nak@symbioticeda.com> | 2020-03-06 16:45:36 +0100 |
commit | 8a39a580e1f22b766af51b0d0d8b2fb9f5cf2f71 (patch) | |
tree | ab97eba97a8fdca46606d3014c343d9f97327493 /techlibs | |
parent | 48a9b4f616d885079b7f682aa2ae2149493122cf (diff) | |
download | yosys-8a39a580e1f22b766af51b0d0d8b2fb9f5cf2f71.tar.gz yosys-8a39a580e1f22b766af51b0d0d8b2fb9f5cf2f71.tar.bz2 yosys-8a39a580e1f22b766af51b0d0d8b2fb9f5cf2f71.zip |
remove unused parameters
Diffstat (limited to 'techlibs')
-rw-r--r-- | techlibs/ecp5/brams_map.v | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/techlibs/ecp5/brams_map.v b/techlibs/ecp5/brams_map.v index ec1f27f41..edda17c02 100644 --- a/techlibs/ecp5/brams_map.v +++ b/techlibs/ecp5/brams_map.v @@ -122,7 +122,6 @@ module \$__ECP5_PDPW16KD (CLK2, CLK3, A1ADDR, A1DATA, A1EN, B1ADDR, B1DATA, B1EN parameter CLKPOL2 = 1; parameter CLKPOL3 = 1; parameter [18431:0] INIT = 18432'bx; - parameter TRANSP2 = 0; input CLK2; input CLK3; @@ -138,8 +137,6 @@ module \$__ECP5_PDPW16KD (CLK2, CLK3, A1ADDR, A1DATA, A1EN, B1ADDR, B1DATA, B1EN localparam CLKWMUX = CLKPOL2 ? "CLKA" : "INV"; localparam CLKRMUX = CLKPOL3 ? "CLKB" : "INV"; - localparam WRITEMODE_A = TRANSP2 ? "WRITETHROUGH" : "READBEFOREWRITE"; - PDPW16KD #( `include "bram_init_9_18_36.vh" .DATA_WIDTH_W(36), |