aboutsummaryrefslogtreecommitdiffstats
path: root/techlibs
diff options
context:
space:
mode:
authorEddie Hung <eddie@fpgeh.com>2019-12-16 12:07:49 -0800
committerEddie Hung <eddie@fpgeh.com>2019-12-16 12:07:49 -0800
commit952d62991fcdb3d5eb55eb5647cda3b4b285bfe2 (patch)
treef8452a91984358d4dc27e98e823bf81a0433f575 /techlibs
parent6d4b6b1e69b2e332d512ed151398bb6bd8e3f3c7 (diff)
parent87e21b0122bd682db8aeffae3e1ac503c9cea2d2 (diff)
downloadyosys-952d62991fcdb3d5eb55eb5647cda3b4b285bfe2.tar.gz
yosys-952d62991fcdb3d5eb55eb5647cda3b4b285bfe2.tar.bz2
yosys-952d62991fcdb3d5eb55eb5647cda3b4b285bfe2.zip
Merge branch 'diego/memattr' of https://github.com/dh73/yosys into diego/memattr
Diffstat (limited to 'techlibs')
-rw-r--r--techlibs/xilinx/xc7_xcu_brams.txt13
1 files changed, 13 insertions, 0 deletions
diff --git a/techlibs/xilinx/xc7_xcu_brams.txt b/techlibs/xilinx/xc7_xcu_brams.txt
index b7c893ff7..1374a0a36 100644
--- a/techlibs/xilinx/xc7_xcu_brams.txt
+++ b/techlibs/xilinx/xc7_xcu_brams.txt
@@ -77,6 +77,9 @@ endbram
# https://www.xilinx.com/support/documentation/user_guides/ug473_7Series_Memory_Resources.pdf
match $__XILINX_RAMB36_SDP
+ attribute ram_style=block ram_block=1
+ attribute !ram_style
+ attribute !logic_block
min bits 1024
min efficiency 5
shuffle_enable B
@@ -85,6 +88,9 @@ match $__XILINX_RAMB36_SDP
endmatch
match $__XILINX_RAMB18_SDP
+ attribute ram_style=block ram_block=1
+ attribute !ram_style
+ attribute !logic_block
min bits 1024
min efficiency 5
shuffle_enable B
@@ -93,6 +99,9 @@ match $__XILINX_RAMB18_SDP
endmatch
match $__XILINX_RAMB36_TDP
+ attribute ram_style=block ram_block=1
+ attribute !ram_style
+ attribute !logic_block
min bits 1024
min efficiency 5
shuffle_enable B
@@ -101,8 +110,12 @@ match $__XILINX_RAMB36_TDP
endmatch
match $__XILINX_RAMB18_TDP
+ attribute ram_style=block ram_block=1
+ attribute !ram_style
+ attribute !logic_block
min bits 1024
min efficiency 5
shuffle_enable B
make_transp
endmatch
+