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| author | Eddie Hung <eddie@fpgeh.com> | 2019-08-07 13:59:07 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-08-07 13:59:07 -0700 |
| commit | a206aed977e92a63aa52137690e20897f27df458 (patch) | |
| tree | e34148f8077992b71367fa12e489f0a3d931af9b /techlibs | |
| parent | d90b8b081a6102303f2392fc21164fddde90e587 (diff) | |
| download | yosys-a206aed977e92a63aa52137690e20897f27df458.tar.gz yosys-a206aed977e92a63aa52137690e20897f27df458.tar.bz2 yosys-a206aed977e92a63aa52137690e20897f27df458.zip | |
Run "opt_expr -fine" instead of "wreduce" due to #1213
Diffstat (limited to 'techlibs')
| -rw-r--r-- | techlibs/ice40/synth_ice40.cc | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/techlibs/ice40/synth_ice40.cc b/techlibs/ice40/synth_ice40.cc index 2cc5fd5fd..09759f359 100644 --- a/techlibs/ice40/synth_ice40.cc +++ b/techlibs/ice40/synth_ice40.cc @@ -267,8 +267,7 @@ struct SynthIce40Pass : public ScriptPass run("opt_clean"); if (help_mode || dsp) { run("techmap -map +/mul2dsp.v -D DSP_A_MAXWIDTH=16 -D DSP_B_MAXWIDTH=16 -D DSP_A_MINWIDTH=2 -D DSP_B_MINWIDTH=2 -D DSP_Y_MINWIDTH=11 -D DSP_NAME=$__MUL16X16", "(if -dsp)"); - run("opt_expr", " (if -dsp)"); - run("wreduce", " (if -dsp)"); + run("opt_expr -fine", " (if -dsp)"); run("ice40_dsp", " (if -dsp)"); run("chtype -set $mul t:$__soft_mul","(if -dsp)"); } |