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| author | Eddie Hung <eddie@fpgeh.com> | 2019-09-11 11:46:21 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-09-11 11:46:21 -0700 |
| commit | d232e6a6cd8ed0ac0e76a1e6b787cb6dead855f0 (patch) | |
| tree | 9fffc74c2c967340d88da84d83e076d91bef280f /techlibs | |
| parent | e5bdb521fa5ca535ef51d080f11d3470003b49e2 (diff) | |
| download | yosys-d232e6a6cd8ed0ac0e76a1e6b787cb6dead855f0.tar.gz yosys-d232e6a6cd8ed0ac0e76a1e6b787cb6dead855f0.tar.bz2 yosys-d232e6a6cd8ed0ac0e76a1e6b787cb6dead855f0.zip | |
Input registers to add DSP as new siguser to block upstream packing
Diffstat (limited to 'techlibs')
0 files changed, 0 insertions, 0 deletions