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author | Eddie Hung <eddie@fpgeh.com> | 2019-09-10 14:11:56 -0700 |
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committer | Eddie Hung <eddie@fpgeh.com> | 2019-09-10 14:11:56 -0700 |
commit | f3a55d3f06a21af06a267b3f9da8bd4df3d4aa82 (patch) | |
tree | 1c016b74008599a81a774dab3937fb851048b9f0 /techlibs | |
parent | 8514e7c32ebfb2ce35619063b1507416f01bd3b4 (diff) | |
download | yosys-f3a55d3f06a21af06a267b3f9da8bd4df3d4aa82.tar.gz yosys-f3a55d3f06a21af06a267b3f9da8bd4df3d4aa82.tar.bz2 yosys-f3a55d3f06a21af06a267b3f9da8bd4df3d4aa82.zip |
Add comment for why opt_expr is necessary
Diffstat (limited to 'techlibs')
-rw-r--r-- | techlibs/xilinx/synth_xilinx.cc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/techlibs/xilinx/synth_xilinx.cc b/techlibs/xilinx/synth_xilinx.cc index 2cf0bd4f9..c99b77905 100644 --- a/techlibs/xilinx/synth_xilinx.cc +++ b/techlibs/xilinx/synth_xilinx.cc @@ -325,6 +325,8 @@ struct SynthXilinxPass : public ScriptPass if (!nodsp || help_mode) { // NB: Xilinx multipliers are signed only run("techmap -map +/mul2dsp.v -map +/xilinx/dsp_map.v -D DSP_A_MAXWIDTH=25 -D DSP_A_MAXWIDTH_PARTIAL=18 -D DSP_B_MAXWIDTH=18 -D DSP_SIGNEDONLY=1 -D DSP_NAME=$__MUL25X18", "(skip if '-nodsp')"); + // Necessary for optimising away $shl cells, as well as $add cells + // that have inputs with 1'b0 LSBs run("opt_expr -fine", " (skip if '-nodsp')"); run("wreduce", " (skip if '-nodsp')"); run("xilinx_dsp", " (skip if '-nodsp')"); |