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authorAndrew Zonenberg <azonenberg@drawersteak.com>2017-08-29 14:17:29 -0700
committerAndrew Zonenberg <azonenberg@drawersteak.com>2017-09-01 06:44:28 -0700
commitfc0c7f74dc9133bbf19aa9eafff26738a05135ef (patch)
tree2018cfb4f370b1ba7937d849e7ed915642f8964c /techlibs
parent80aaf503025e1cabf12f0bd273c95f369de36969 (diff)
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Added blackbox $__COUNT_ cell model
Diffstat (limited to 'techlibs')
-rw-r--r--techlibs/greenpak4/Makefile.inc1
-rw-r--r--techlibs/greenpak4/cells_blackbox.v17
2 files changed, 18 insertions, 0 deletions
diff --git a/techlibs/greenpak4/Makefile.inc b/techlibs/greenpak4/Makefile.inc
index 9c3efcb8d..b43fb7511 100644
--- a/techlibs/greenpak4/Makefile.inc
+++ b/techlibs/greenpak4/Makefile.inc
@@ -2,6 +2,7 @@
OBJS += techlibs/greenpak4/synth_greenpak4.o
OBJS += techlibs/greenpak4/greenpak4_dffinv.o
+$(eval $(call add_share_file,share/greenpak4,techlibs/greenpak4/cells_blackbox.v))
$(eval $(call add_share_file,share/greenpak4,techlibs/greenpak4/cells_latch.v))
$(eval $(call add_share_file,share/greenpak4,techlibs/greenpak4/cells_map.v))
$(eval $(call add_share_file,share/greenpak4,techlibs/greenpak4/cells_sim.v))
diff --git a/techlibs/greenpak4/cells_blackbox.v b/techlibs/greenpak4/cells_blackbox.v
new file mode 100644
index 000000000..8dd38a027
--- /dev/null
+++ b/techlibs/greenpak4/cells_blackbox.v
@@ -0,0 +1,17 @@
+module \$__COUNT_ (CE, CLK, OUT, POUT, RST, UP);
+
+ input wire CE;
+ input wire CLK;
+ output reg OUT;
+ output reg[WIDTH-1:0] POUT;
+ input wire RST;
+ input wire UP;
+
+ parameter COUNT_TO = 1;
+ parameter RESET_MODE = "RISING";
+ parameter HAS_POUT = 0;
+ parameter HAS_CE = 0;
+ parameter WIDTH = 8;
+ parameter DIRECTION = "DOWN";
+
+endmodule