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| author | Claire Wolf <clifford@clifford.at> | 2020-05-01 14:58:41 +0200 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-05-01 14:58:41 +0200 |
| commit | d047ca8b11384dfe8f5d4b63ae7b3e6dfa2d6558 (patch) | |
| tree | 4b1baef137066e17ce882f537853adc27814252a /tests/hana/test_simulation_techmap.v | |
| parent | bc380b0b56e0fa269a0d5844280cc4419d438d3a (diff) | |
| parent | 9f1fb11b1d4d7326c4ba543778993dd6fb655953 (diff) | |
| download | yosys-d047ca8b11384dfe8f5d4b63ae7b3e6dfa2d6558.tar.gz yosys-d047ca8b11384dfe8f5d4b63ae7b3e6dfa2d6558.tar.bz2 yosys-d047ca8b11384dfe8f5d4b63ae7b3e6dfa2d6558.zip | |
Merge pull request #1981 from YosysHQ/claire/fix1837
Clear current_scope when done with RTLIL generation
Diffstat (limited to 'tests/hana/test_simulation_techmap.v')
0 files changed, 0 insertions, 0 deletions